-
Notifications
You must be signed in to change notification settings - Fork 6
/
ntag_defs.h
89 lines (73 loc) · 3.1 KB
/
ntag_defs.h
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
/*
* Copyright (c) 2016, NXP Semiconductor
* All rights reserved.
*
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#ifndef NTAG_DEFINES_H
#define NTAG_DEFINES_H
/*! @file ntag_defs.h
* @brief Constants used by the NTAG I2C tag driver.
*/
#define NTAG_MAX_WRITE_DELAY_MS 10
#define NTAG_I2C_BLOCK_SIZE 16
#ifndef NULL
#define NULL 0
#endif
//----------------------------------------------------------------------
///
/// Memory addresses as seen from I2C perspective.
#define NTAG_MEM_ADRR_I2C_ADDRESS 0x00
#define NTAG_MEM_BLOCK_START_USER_MEMORY 0x01
#define NTAG_MEM_ADDR_START_USER_MEMORY (NTAG_MEM_BLOCK_START_USER_MEMORY * NTAG_I2C_BLOCK_SIZE)
#define NTAG_MEM_BLOCK_CONFIGURATION_2k 0x7A
#define NTAG_MEM_ADDR_CONFIGURATION_2k (NTAG_MEM_BLOCK_CONFIGURATION_2k * NTAG_I2C_BLOCK_SIZE)
#define NTAG_MEM_BLOCK_CONFIGURATION_1k 0x3A
#define NTAG_MEM_ADDR_CONFIGURATION_1k (NTAG_MEM_BLOCK_CONFIGURATION_1k * NTAG_I2C_BLOCK_SIZE)
#define NTAG_MEM_ADDR_DEFAULT_REGS (NTAG_MEM_BLOCK_DEFAULT_REGS * NTAG_I2C_BLOCK_SIZE)
#define NTAG_MEM_BLOCK_SESSION_REGS 0xFE
#define NTAG_MEM_BLOCK_START_SRAM 0xF8
#define NTAG_MEM_ADDR_START_SRAM (NTAG_MEM_BLOCK_START_SRAM * NTAG_I2C_BLOCK_SIZE)
#define NTAG_MEM_SRAM_BLOCKS 4
#define NTAG_MEM_SRAM_SIZE (NTAG_MEM_SRAM_BLOCKS * NTAG_I2C_BLOCK_SIZE)
//----------------------------------------------------------------------
///
/// Byte offset in Session and Configuration
#define NTAG_MEM_OFFSET_NC_REG 0x00
#define NTAG_MEM_OFFSET_LAST_NDEF_BLOCK 0x01
#define NTAG_MEM_OFFSET_SRAM_MIRROR_BLOCK 0x02
#define NTAG_MEM_OFFSET_WDT_LS 0x03
#define NTAG_MEM_OFFSET_WDT_MS 0x04
#define NTAG_MEM_OFFSET_I2C_CLOCK_STR 0x05
#define NTAG_MEM_OFFSET_REG_LOCK 0x06
#define NTAG_MEM_OFFSET_NS_REG 0x06
//----------------------------------------------------------------------
///
/// Memory bit masks
#define NTAG_NC_REG_MASK_I2C_RST_ON_OFF 0x80
#define NTAG_NC_REG_MASK_PTHRU_ON_OFF 0x40
#define NTAG_NC_REG_MASK_FD_OFF 0x30
#define NTAG_NC_REG_MASK_FD_ON 0x0C
#define NTAG_NC_REG_MASK_SRAM_MIRROR_ON_OFF 0x02
#define NTAG_NC_REG_MASK_TRANSFER_DIR 0x01
#define NTAG_REG_LOCK_MASK_CONF_BYTES_ACCESS_I2C 0x02
#define NTAG_REG_LOCK_MASK_CONF_BYTES_ACCESS_RF 0x01
#define NTAG_NS_REG_MASK_NDEF_DATA_READ 0x80
#define NTAG_NS_REG_MASK_I2C_LOCKED 0x40
#define NTAG_NS_REG_MASK_RF_LOCKED 0x20
#define NTAG_NS_REG_MASK_SRAM_I2C_READY 0x10
#define NTAG_NS_REG_MASK_SRAM_RF_READY 0x08
#define NTAG_NS_REG_MASK_EEPROM_WR_ERR 0x04
#define NTAG_NS_REG_MASK_EEPROM_WR_BUSY 0x02
#define NTAG_NS_REG_MASK_RF_FIELD_PRESENT 0x01
// //----------------------------------------------------------------------
// ///
// /// Error codes
// #define NTAG_ERR_OK 0x00
// #define NTAG_ERR_COMMUNICATION -0x01
// #define NTAG_ERR_BUFF_OVERFLOW -0x02
// #define NTAG_ERR_INIT_FAILED -0x03
// #define NTAG_ERR_INVALID_PARAM -0x09
#endif // NTAG_DEFINES_H