manual_sequence_event_graph.txt

{
    'set_c_reset_n': {'set_clock_flol'},
    'set_clock_flol' : {'set_pll_dc_ok'},
    'set_pll_dc_ok' : {'mgtvccaux_r'},
    'mgtvccaux_r': {'set_en_mgtvccaux_r'},
    'set_en_mgtvccaux_r' : {'mgtvccaux_l'},
    'mgtvccaux_l' : {'set_en_mgtvccaux_l'},
    'set_en_mgtvccaux_l' : {'set_en_mgtavtt_fpga'},
    'set_en_mgtavtt_fpga' : {'mgtavcc_fpga'},
    'mgtavcc_fpga' : {'set_en_mgtavcc_fpga'},
    'set_en_mgtavcc_fpga' : {'set_en_vadj_1v8_fpga'},
    'set_en_vadj_1v8_fpga' : {'set_en_vdd_ddrfpga13'},
    'set_en_vdd_ddrfpga13' : {'set_en_vdd_ddrfpga24'},
    'set_en_vdd_ddrfpga24' : {'sys_2v5_13'},
    'sys_2v5_13' : {'set_en_sys_2v5_13'},
    'set_en_sys_2v5_13' : {'sys_2v5_24'},
    'sys_2v5_24' : {'set_en_sys_2v5_24'},
    'set_en_sys_2v5_24' : {'sys_1v8'},
    'sys_1v8' : {'set_en_sys_1v8'},
    'set_en_sys_1v8' : {'vcc1v8_fpga'},
    'vcc1v8_fpga' : {'set_en_vcc1v8_fpga'},
    'set_en_vcc1v8_fpga' : {'vccintio_bram_fpga'},
    'set_vccintio_bram_fpga' : {'set_en_vccintio_bram_fpga'},
    'set_en_vccintio_bram_fpga' : {'set_en_vccint_fpga'},
    'set_en_vccint_fpga' : {'util33'},
    'util33' : {'set_en_util33'},
    'set_en_util33' : {'set_en_vdd_ddrcpu24'},
    'set_en_vdd_ddrcpu24' : {'set_en_vdd_ddrcpu13'},
    'set_en_vdd_ddrcpu13' : {'2v5_cpu24'},
    '2v5_cpu24' : {'set_en_2v5_cpu24'},
    'set_en_2v5_cpu24' : {'2v5_cpu13'},
    '2v5_cpu13' : {'set_en_2v5_cpu13'},
    'set_en_2v5_cpu13': {'1v5_vdd_oct'},
    '1v5_vdd_oct' : {'set_en_1v5_vdd_oct'},
    'set_en_1v5_vdd_oct' : {'0v9_vdd_oct'},
    '0v9_vdd_oct' : {'set_vdd_oct_en_12'},
    'set_vdd_oct_en_12' : {'vdd_core'},
    'vdd_core' : {'set_vdd_core_en'},
    'set_vdd_core_en' : {'set_vdd_core', 'set_0v9_vdd_oct'},
    'set_vdd_core': {'set_fpga_clk'},
    'set_0v9_vdd_oct' : {'set_fpga_clk'},
    'set_fpga_clk' : {'set_pll_ref_clk'},
    'set_pll_ref_clk': {'set_clk_main'},
    'set_clk_main': {'12v_cpu1_psup'},
    '12v_cpu1_psup' : {'3v3_psup'},
    '3v3_psup': {'5v_psup'},
    '5v_psup' : {'12v_cpu0_psup'},
    '12v_cpu0_psup' : {'set_b_psup_on'},
    'set_b_psup_on' : set(),
}