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ZBWIPPQR.PRI
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ZBWIPPQR.PRI
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SPRINZBWIPPQR
HPRINZBWIPPQR
SP09POST PostScript printer driver
SP0AZBWIPPQRXPOST00009PS lv.2 ISO Latin1 R4.5A+ONLY!1117111711170000 DEVELOPER 20100909222948700 N4S RUSSELL 20100819160843640 JP1 SAP 2000080715380250A BIN
FO03 0.00 ZBWIPPQRCOURIER 000 SF001 SF001 X0
FO03 0.00 ZBWIPPQRCOURIER 000 X SF002 SF002 X0
FO03 0.00 ZBWIPPQRCOURIER 000X SF003 SF003 X0
FO03 0.00 ZBWIPPQRCOURIER 000XX SF004 SF004 X0
FO03 0.00 ZBWIPPQRHELVE 000 SF005 SF005 X0
FO03 0.00 ZBWIPPQRHELVE 000 X SF006 SF006 X0
FO03 0.00 ZBWIPPQRHELVE 000X SF007 SF007 X0
FO03 0.00 ZBWIPPQRHELVE 000XX SF008 SF008 X0
FO03 0.00 ZBWIPPQRTIMES 000 SF009 SF009 X0
FO03 0.00 ZBWIPPQRTIMES 000 X SF010 SF010 X0
FO03 0.00 ZBWIPPQRTIMES 000X SF011 SF011 X0
FO03 0.00 ZBWIPPQRTIMES 000XX SF012 SF012 X0
FO06ZBWIPPQRARTNR SBP01SBS01
FO06ZBWIPPQRAUFNR SBP01SBS01
FO06ZBWIPPQRBARCLVS SBP01SBS01
FO06ZBWIPPQRBC_C128BSBP01SBS01
FO06ZBWIPPQRBC_CD39 SBP01SBS01
FO06ZBWIPPQRBC_CD39CSBP01SBS01
FO06ZBWIPPQRBC_EAN13SBP01SBS01
FO06ZBWIPPQRBC_EAN8 SBP01SBS01
FO06ZBWIPPQRBC_EANH SBP01SBS01
FO06ZBWIPPQRBC_ESC SBP00SBS00
FO06ZBWIPPQRBC_I25 SBP01SBS01
FO06ZBWIPPQRBC_I25C SBP01SBS01
FO06ZBWIPPQRBC_JAN SBP26SBS26
FO06ZBWIPPQRBC_MSI SBP01SBS01
FO06ZBWIPPQRBC_MSIC SBP01SBS01
FO06ZBWIPPQRBC_MSIC1SBP01SBS01
FO06ZBWIPPQRBC_MSIC2SBP01SBS01
FO06ZBWIPPQRBC_PSN5 SBP01SBS01
FO06ZBWIPPQRBC_PSN9 SBP01SBS01
FO06ZBWIPPQRKUNAUNR SBP01SBS01
FO06ZBWIPPQRKUNAUPS SBP01SBS01
FO06ZBWIPPQRMBBARC SBP01SBS01
FO06ZBWIPPQRMBBARC1 SBP01SBS01
FO06ZBWIPPQRRSNUM SBP01SBS01
FO06ZBWIPPQRRSPOS SBP01SBS01
FO06ZBWIPPQRRUECKNR SBP01SBS01
022DZBWIPPQRCOL0H 1X
022DZBWIPPQRCOL0N 1X
022DZBWIPPQRCOL0V 1X
022DZBWIPPQRCOL1H 1X
022DZBWIPPQRCOL1N 1X
022DZBWIPPQRCOL1V 1X
022DZBWIPPQRCOL2H 1X
022DZBWIPPQRCOL2N 1X
022DZBWIPPQRCOL2V 1X
022DZBWIPPQRCOL3H 1X
022DZBWIPPQRCOL3N 1X
022DZBWIPPQRCOL3V 1X
022DZBWIPPQRCOL4H 1X
022DZBWIPPQRCOL4N 1X
022DZBWIPPQRCOL4V 1X
022DZBWIPPQRCOL5H 1X
022DZBWIPPQRCOL5N 1X
022DZBWIPPQRCOL5V 1X
022DZBWIPPQRCOL6H 1X
022DZBWIPPQRCOL6N 1X
022DZBWIPPQRCOL6V 1X
022DZBWIPPQRCOL7H 1X
022DZBWIPPQRCOL7N 1X
022DZBWIPPQRCOL7V 1X
022DZBWIPPQRS0000 1X
022DZBWIPPQRS1100 1X
022DZBWIPPQRS1150 1X
022DZBWIPPQRS1401 1X
022DZBWIPPQRS1500 1X
022DZBWIPPQRS1610 1X
022DZBWIPPQRS1700 1X
022DZBWIPPQRS1800 1X
022DZBWIPPQRS4001 1X
022DZBWIPPQRS4004 1X
022DZBWIPPQRS8000 1X
022DZBWIPPQRS8300 1X
022DZBWIPPQRS8400 1X
022DZBWIPPQRS8500 1X
022DZBWIPPQRS8600 1X
022DZBWIPPQRS<<<< 1X
022DZBWIPPQRS>>>> 1X
022DZBWIPPQRSABLD 1X
022DZBWIPPQRSAOFF 1X
022DZBWIPPQRSAULN 1X
022DZBWIPPQRSBP00 1X 25
022DZBWIPPQRSBP01 1X 2520
022DZBWIPPQRSBP02 1
022DZBWIPPQRSBS00 1
022DZBWIPPQRSBS01 1X 0A
022DZBWIPPQRSBS02 1X 2073
022DZBWIPPQRSF001 1X 436F7572696572
022DZBWIPPQRSF002 1X 436F75726965722D4F626C69717565
022DZBWIPPQRSF003 1X 436F75726965722D426F6C64
022DZBWIPPQRSF004 1X 436F75726965722D426F6C644F626C69717565
022DZBWIPPQRSF005 1X 48656C766574696361
022DZBWIPPQRSF006 1X 48656C7665746963612D4F626C69717565
022DZBWIPPQRSF007 1X 48656C7665746963612D426F6C64
022DZBWIPPQRSF008 1X 48656C7665746963612D426F6C644F626C69717565
022DZBWIPPQRSF009 1X 54696D65732D526F6D616E
022DZBWIPPQRSF010 1X 54696D65732D4974616C6963
022DZBWIPPQRSF011 1X 54696D65732D426F6C64
022DZBWIPPQRSF012 1X 54696D65732D426F6C644974616C6963
022DZBWIPPQRSF013 1X 54696D65732D526F6D616E
022DZBWIPPQRSF014 1X 54696D65732D4974616C6963
022DZBWIPPQRSF015 1X 54696D65732D426F6C64
022DZBWIPPQRSF016 1X 54696D65732D426F6C644974616C6963
022DZBWIPPQRSOB01 1 OutputBin1
022DZBWIPPQRSOB02 1 OutputBin2
022DZBWIPPQRSOB03 1X
022DZBWIPPQRSPMBS 1X
022DZBWIPPQRSPMDU 1 PrintModeDuplex
022DZBWIPPQRSPMFS 1X
022DZBWIPPQRSPMSI 1 PrintModeSimplex
022DZBWIPPQRSPMTU 1 PrintModeTumble
022DZBWIPPQRTRY01 1X 203020536574496E70757454726179
022DZBWIPPQRTRY02 1X 203120536574496E70757454726179
022DZBWIPPQRTRY03 1X 203320536574496E70757454726179
022DZBWIPPQRTRY04 1X 203220536574496E70757454726179
022DZBWIPPQRTRYEN 1
022DZBWIPPQRTRYME 1
022DZBWIPPQRTRYMN 1
022DZBWIPPQRZBW01 1 /s {bct exch ctxt /bct exch def} def \n
022DZBWIPPQRZBW02 1 bwippst\nbct sqrd\nbwippen\n
022DZBWIPPQRZBW03 1 %%bct sqrd \n /bct () def \n /s {show} def \n
022DZBWIPPQRZDN01 1 /bcver bcver 1 sub def\n
022DZBWIPPQRZDN10 1 /bcver bcver 10 sub def\n
022DZBWIPPQRZDN50 1 /bcver bcver 50 sub def\n
022DZBWIPPQRZLT01 1 /bchor bchor 1 sub def\n
022DZBWIPPQRZLT10 1 /bchor bchor 10 sub def\n
022DZBWIPPQRZLT50 1 /bchor bchor 50 sub def\n
022DZBWIPPQRZOP01 1 /bcopt (parse) def\n
022DZBWIPPQRZOP02 1 /bcopt (raw) def\n
022DZBWIPPQRZPD01 1 %%PDSTEXTz\n
022DZBWIPPQRZQR01 1 %%QRSTEXTz\n
022DZBWIPPQRZQR02 1 %%QRETEXTz\n
022DZBWIPPQRZRO01 1 /bcrot bcrot 45 add def\n
022DZBWIPPQRZRT01 1 /bchor bchor 1 add def\n
022DZBWIPPQRZRT10 1 /bchor bchor 10 add def\n
022DZBWIPPQRZRT50 1 /bchor bchor 50 add def\n
022DZBWIPPQRZSH01 1 %%SHIFTSz\n
022DZBWIPPQRZSH02 1 %%SHIFTEz\n
022DZBWIPPQRZSX01 1 /bcscx bcscx 0.1 add def\n
022DZBWIPPQRZSX02 1 /bcscx bcscx 0.1 sub def\n
022DZBWIPPQRZSY01 1 /bcscy bcscy 0.1 add def\n
022DZBWIPPQRZSY02 1 /bcscy bcscy 0.1 sub def\n
022DZBWIPPQRZUP01 1 /bcver bcver 1 add def\n
022DZBWIPPQRZUP10 1 /bcver bcver 10 add def\n
022DZBWIPPQRZUP50 1 /bcver bcver 50 add def\n
SP6AZBWIPPQRDINA3 00026 0000 DEVELOPER 20100914234150700 N4S SAP 20001114101909610 BIN SAP 1998012609371040C BIN
SP6XZBWIPPQRDINA3 000000000
SP6AZBWIPPQRDINA4 00097 0000 DEVELOPER 20100914234046700 N4S RUSSELL 20100819163508640 JP1 SAP 20001114101913610 BIN
SP6XZBWIPPQRDINA4 000000000
SP6AZBWIPPQRDINA5 00015 0000 DEVELOPER 20100914234218700 N4S SAP 20001114101918610 BIN SAP 1998012609375440C BIN
SP6XZBWIPPQRDINA5 000000000
SP6AZBWIPPQREXECUTIV 00020 0000 DEVELOPER 20100914234840700 N4S SAP 20001114101922610 BIN SAP 1998012609383640C BIN
SP6XZBWIPPQREXECUTIV 000000000
SP6AZBWIPPQRINCH11 00013 0000 DEVELOPER 20100914234902700 N4S SAP 20001114101927610 BIN SAP 1998012609390440C BIN
SP6XZBWIPPQRINCH11 000000000
SP6AZBWIPPQRINCH12 00016 0000 DEVELOPER 20100914234913700 N4S SAP 20001114101931610 BIN SAP 1998012609393140C BIN
SP6XZBWIPPQRINCH12 000000000
SP6AZBWIPPQRINCH2 00017 0000 DEVELOPER 20100914234923700 N4S SAP 20001114101936610 BIN SAP 1998042117362140C BIN
SP6XZBWIPPQRINCH2 000000000
SP6AZBWIPPQRINCH4 00015 0000 DEVELOPER 20100914234932700 N4S SAP 20001114101940610 BIN SAP 1998012609395040C BIN
SP6XZBWIPPQRINCH4 000000000
SP6AZBWIPPQRINCH4C 00015 0000 DEVELOPER 20100914234941700 N4S SAP 20001114101945610 BIN SAP 1998012609401140C BIN
SP6XZBWIPPQRINCH4C 000000000
SP6AZBWIPPQRINCH5 00016 0000 DEVELOPER 20100914234952700 N4S SAP 20001114101951610 BIN SAP 1998021009544640C BIN
SP6XZBWIPPQRINCH5 000000000
SP6AZBWIPPQRINCH6 00015 0000 DEVELOPER 20100914235002700 N4S SAP 20001114101959610 BIN SAP 1998012609402740C BIN
SP6XZBWIPPQRINCH6 000000000
SP6AZBWIPPQRINCH7 00013 0000 DEVELOPER 20100914235012700 N4S SAP 20001114102008610 BIN SAP 1998012609404040C BIN
SP6XZBWIPPQRINCH7 000000000
SP6AZBWIPPQRINCH8 00012 0000 DEVELOPER 20100914235021700 N4S SAP 20001114102012610 BIN SAP 1998012609410540C BIN
SP6XZBWIPPQRINCH8 000000000
SP6AZBWIPPQRLEGAL 00022 0000 DEVELOPER 20100914234711700 N4S SAP 20001114102016610 BIN SAP 1998012609412840C BIN
SP6XZBWIPPQRLEGAL 000000000
SP6AZBWIPPQRLETTER 00022 0000 DEVELOPER 20100914234724700 N4S SAP 20001114102020610 BIN SAP 1998012609414340C BIN
SP6XZBWIPPQRLETTER 000000000
SP6AZBWIPPQRLINE_21 00012 0000 DEVELOPER 20100914234744700 N4S SAP 20001114102024610 BIN SAP 1998012609415540C BIN
SP6XZBWIPPQRLINE_21 000000000
SP6AZBWIPPQRLINE_22 00012 0000 DEVELOPER 20100914234759700 N4S SAP 20001114102028610 BIN SAP 1998012609420540C BIN
SP6XZBWIPPQRLINE_22 000000000
SP6AZBWIPPQRX_44_120 00024 0000 DEVELOPER 20100914234456700 N4S SAP 1998041617185540C BIN SAP 1996051400000040A BIN
SP6XZBWIPPQRX_44_120 POST Courier 0600V D000000000
SP6AZBWIPPQRX_58_170 00023 0000 DEVELOPER 20100914234511700 N4S SAP 1998041617190440C BIN SAP 1996051400000040A BIN
SP6XZBWIPPQRX_58_170 POST Courier 0600V D000000000
SP6AZBWIPPQRX_65_132 00025 0000 DEVELOPER 20100914234532700 N4S SAP 1998041617191340C BIN SAP 1996051400000040A BIN
SP6XZBWIPPQRX_65_132 POST Courier 0600V D000000000
SP6AZBWIPPQRX_65_200 00026 0000 DEVELOPER 20100914234542700 N4S SAP 1998111709412646A BIN SAP
SP6XZBWIPPQRX_65_200 POST Courier 0600V D000000000
SP6AZBWIPPQRX_65_255 00027 0000 DEVELOPER 20100914234555700 N4S RUSSELL 20100724090927640 JP1 SAP 1998041617192040C BIN
SP6XZBWIPPQRX_65_255 POST Courier 0600V D000000000
SP6AZBWIPPQRX_65_80 00025 0000 DEVELOPER 20100914234605700 N4S SAP 1998041617192740C BIN SAP 1996051400000040A BIN
SP6XZBWIPPQRX_65_80 POST Courier 0600V D000000000
SP6AZBWIPPQRX_90_120 00025 0000 DEVELOPER 20100908232754700 N4S SAP 1998041617193440C BIN SAP 1996051400000040A BIN
SP6XZBWIPPQRX_90_120 POST Courier 0600V D000000000
SP1DDINA3 DINA3 .S0000000000SAP 1997081213394540A BIN SAP SAP
SP1XDINA3 000000000000000000000000
SP06001006ZBWIPPQRDINA3 CONTROL 2 \n
SP06002072ZBWIPPQRDINA3 CONTROL DEVELOPER 100914N4S 700 DEVELOPER 100830N4S 700 DEVELOPER 100830\n
SP06003072ZBWIPPQRDINA3 CONTROL 0000 \n
SP06004072ZBWIPPQRDINA3 CONTROL \n
SP06001043ZBWIPPQRDINA3 ENDLINE #this is a reference to another device type
SP06002026ZBWIPPQRDINA3 ENDLINE \i<POSTSCPT:DINA3:ENDLINE>
SP06001043ZBWIPPQRDINA3 ENDPAGE #this is a reference to another device type
SP06002026ZBWIPPQRDINA3 ENDPAGE \i<POSTSCPT:DINA3:ENDPAGE>
SP06001043ZBWIPPQRDINA3 LEAVE #this is a reference to another device type
SP06002024ZBWIPPQRDINA3 LEAVE \i<POSTSCPT:DINA3:LEAVE>
SP06001043ZBWIPPQRDINA3 SETUP #this is a reference to another device type
SP06002026ZBWIPPQRDINA3 SETUP \i<POSTSCPT:DINA3:SETUP>\n
SP06003027ZBWIPPQRDINA3 SETUP \i<ZBWIPPQR:DINA4:ZBWIPP>\n
SP06004027ZBWIPPQRDINA3 SETUP \i<ZBWIPPQR:DINA4:ZREND3>\n
SP06005026ZBWIPPQRDINA3 SETUP \i<ZBWIPPQR:DINA4:ZENC1>\n
SP06006026ZBWIPPQRDINA3 SETUP \i<ZBWIPPQR:DINA4:ZENC2>\n
SP06007026ZBWIPPQRDINA3 SETUP \i<ZBWIPPQR:DINA4:ZENC3>\n
SP06008024ZBWIPPQRDINA3 SETUP \i<ZBWIPPQR:DINA4:ZENC4>
SP1DDINA4 DINA4 .S0000000000SAP 1997081213395640A BIN SAP SAP
SP1XDINA4 000000000000000000000000
SP06001006ZBWIPPQRDINA4 CONTROL 23 \n
SP06002072ZBWIPPQRDINA4 CONTROL DEVELOPER 100914N4S 700 DEVELOPER 100909N4S 700 DEVELOPER 100831\n
SP06003072ZBWIPPQRDINA4 CONTROL 0000 \n
SP06004072ZBWIPPQRDINA4 CONTROL \n
SP06001043ZBWIPPQRDINA4 ENDLINE #this is a reference to another device type
SP06002026ZBWIPPQRDINA4 ENDLINE \i<POSTSCPT:DINA4:ENDLINE>
SP06001043ZBWIPPQRDINA4 ENDPAGE #this is a reference to another device type
SP06002028ZBWIPPQRDINA4 ENDPAGE \i<POSTSCPT:DINA4:ENDPAGE>\n
SP06001043ZBWIPPQRDINA4 LEAVE #this is a reference to another device type
SP06002024ZBWIPPQRDINA4 LEAVE \i<POSTSCPT:DINA4:LEAVE>
SP06001026ZBWIPPQRDINA4 SETUP \i<POSTSCPT:DINA4:SETUP>\n
SP06002027ZBWIPPQRDINA4 SETUP \i<ZBWIPPQR:DINA4:ZBWIPP>\n
SP06003027ZBWIPPQRDINA4 SETUP \i<ZBWIPPQR:DINA4:ZREND3>\n
SP06004026ZBWIPPQRDINA4 SETUP \i<ZBWIPPQR:DINA4:ZENC1>\n
SP06005026ZBWIPPQRDINA4 SETUP \i<ZBWIPPQR:DINA4:ZENC2>\n
SP06006026ZBWIPPQRDINA4 SETUP \i<ZBWIPPQR:DINA4:ZENC3>\n
SP06007024ZBWIPPQRDINA4 SETUP \i<ZBWIPPQR:DINA4:ZENC4>
SP06001015ZBWIPPQRDINA4 STRTPAGE %%GOTOBARCODE\n
SP06000007ZBWIPPQRDINA4 ZBWIPP CREDITS
SP06001016ZBWIPPQRDINA4 ZBWIPP ##usage: CREDITS
SP06002036ZBWIPPQRDINA4 ZBWIPP ##DO NOT CHANGE the first two lines!
SP06003053ZBWIPPQRDINA4 ZBWIPP %% SAP device type put together by Robert Russell, \n
SP06004048ZBWIPPQRDINA4 ZBWIPP %% send any comments to rob.roosky@yahoo.com. \n
SP06005019ZBWIPPQRDINA4 ZBWIPP %% 2010 RJR......\n
SP06006009ZBWIPPQRDINA4 ZBWIPP /ctxt {\n
SP06007044ZBWIPPQRDINA4 ZBWIPP 2 copy length exch length add % \n
SP06008059ZBWIPPQRDINA4 ZBWIPP string dup % string1 string2 string string\n
SP06009059ZBWIPPQRDINA4 ZBWIPP 4 2 roll % string string string1 string2\n
SP06010030ZBWIPPQRDINA4 ZBWIPP 2 index 0 3 index\n
SP06011061ZBWIPPQRDINA4 ZBWIPP % string string string1 string2 string 0 string1\n
SP06012056ZBWIPPQRDINA4 ZBWIPP putinterval % stuff the first string in.\n
SP06013044ZBWIPPQRDINA4 ZBWIPP % string string string1 string2\n
SP06014040ZBWIPPQRDINA4 ZBWIPP exch length exch putinterval\n
SP06015007ZBWIPPQRDINA4 ZBWIPP } def\n
SP06016070ZBWIPPQRDINA4 ZBWIPP /sqrd {bcopt /qrcode /uk.co.terryburton.bwipp findresource exec} def\n
SP06017013ZBWIPPQRDINA4 ZBWIPP /bct () def\n
SP06018014ZBWIPPQRDINA4 ZBWIPP /bchor 0 def\n
SP06019014ZBWIPPQRDINA4 ZBWIPP /bcver 0 def\n
SP06020016ZBWIPPQRDINA4 ZBWIPP /bcscx 1.0 def\n
SP06021016ZBWIPPQRDINA4 ZBWIPP /bcscy 1.0 def\n
SP06022015ZBWIPPQRDINA4 ZBWIPP /bcopt () def\n
SP06023015ZBWIPPQRDINA4 ZBWIPP /bcrot 0 def \n
SP06024012ZBWIPPQRDINA4 ZBWIPP /bwippst {\n
SP06025007ZBWIPPQRDINA4 ZBWIPP gsave\n
SP06026024ZBWIPPQRDINA4 ZBWIPP currentpoint translate\n
SP06027019ZBWIPPQRDINA4 ZBWIPP bcscx bcscy scale\n
SP06028021ZBWIPPQRDINA4 ZBWIPP bchor bcver rmoveto\n
SP06029014ZBWIPPQRDINA4 ZBWIPP bcrot rotate\n
SP06030008ZBWIPPQRDINA4 ZBWIPP } def \n
SP06031012ZBWIPPQRDINA4 ZBWIPP /bwippen {\n
SP06032010ZBWIPPQRDINA4 ZBWIPP grestore\n
SP06033013ZBWIPPQRDINA4 ZBWIPP /bct () def\n
SP06034015ZBWIPPQRDINA4 ZBWIPP /s {show} def\n
SP06035015ZBWIPPQRDINA4 ZBWIPP /bchor 0 def\n
SP06036015ZBWIPPQRDINA4 ZBWIPP /bcver 0 def\n
SP06037017ZBWIPPQRDINA4 ZBWIPP /bcscx 1.0 def\n
SP06038017ZBWIPPQRDINA4 ZBWIPP /bcscy 1.0 def\n
SP06039015ZBWIPPQRDINA4 ZBWIPP /bcopt () def\n
SP06040015ZBWIPPQRDINA4 ZBWIPP /bcrot 0 def \n
SP06041007ZBWIPPQRDINA4 ZBWIPP } def\n
SP06042025ZBWIPPQRDINA4 ZBWIPP %%Creator: Terry Burton\n
SP06043026ZBWIPPQRDINA4 ZBWIPP %%DocumentPaperSizes: a4\n
SP06044015ZBWIPPQRDINA4 ZBWIPP %%EndComments\n
SP06045060ZBWIPPQRDINA4 ZBWIPP % Barcode Writer in Pure PostScript - Version 2010-07-16-1\n
SP06046047ZBWIPPQRDINA4 ZBWIPP % http://www.terryburton.co.uk/barcodewriter/\n
SP06047003ZBWIPPQRDINA4 ZBWIPP %\n
SP06048040ZBWIPPQRDINA4 ZBWIPP % Copyright (c) 2004-2010 Terry Burton\n
SP06049003ZBWIPPQRDINA4 ZBWIPP %\n
SP06050056ZBWIPPQRDINA4 ZBWIPP % Permission is hereby granted, free of charge, to any\n
SP06051059ZBWIPPQRDINA4 ZBWIPP % person obtaining a copy of this software and associated\n
SP06052056ZBWIPPQRDINA4 ZBWIPP % documentation files (the "Software"), to deal in the\n
SP06053051ZBWIPPQRDINA4 ZBWIPP % Software without restriction, including without\n
SP06054054ZBWIPPQRDINA4 ZBWIPP % limitation the rights to use, copy, modify, merge,\n
SP06055058ZBWIPPQRDINA4 ZBWIPP % publish, distribute, sublicense, and/or sell copies of\n
SP06056060ZBWIPPQRDINA4 ZBWIPP % the Software, and to permit persons to whom the Software\n
SP06057051ZBWIPPQRDINA4 ZBWIPP % is furnished to do so, subject to the following\n
SP06058015ZBWIPPQRDINA4 ZBWIPP % conditions:\n
SP06059003ZBWIPPQRDINA4 ZBWIPP %\n
SP06060057ZBWIPPQRDINA4 ZBWIPP % The above copyright notice and this permission notice\n
SP06061059ZBWIPPQRDINA4 ZBWIPP % shall be included in all copies or substantial portions\n
SP06062020ZBWIPPQRDINA4 ZBWIPP % of the Software.\n
SP06063003ZBWIPPQRDINA4 ZBWIPP %\n
SP06064061ZBWIPPQRDINA4 ZBWIPP % THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY\n
SP06065058ZBWIPPQRDINA4 ZBWIPP % KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO\n
SP06066052ZBWIPPQRDINA4 ZBWIPP % THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A\n
SP06067061ZBWIPPQRDINA4 ZBWIPP % PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL\n
SP06068061ZBWIPPQRDINA4 ZBWIPP % THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,\n
SP06069055ZBWIPPQRDINA4 ZBWIPP % DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF\n
SP06070059ZBWIPPQRDINA4 ZBWIPP % CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n
SP06071061ZBWIPPQRDINA4 ZBWIPP % CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS\n
SP06072020ZBWIPPQRDINA4 ZBWIPP % IN THE SOFTWARE.\n
SP06073058ZBWIPPQRDINA4 ZBWIPP % Uncomment this next line to allow these named resource\n
SP06074053ZBWIPPQRDINA4 ZBWIPP % definitions to remain resident within a printer's\n
SP06075061ZBWIPPQRDINA4 ZBWIPP % PostScript virtual machine so that the barcode generation\n
SP06076037ZBWIPPQRDINA4 ZBWIPP % capability persists between jobs.\n
SP06077034ZBWIPPQRDINA4 ZBWIPP % serverdict begin 0 exitserver \n
SP06078022ZBWIPPQRDINA4 ZBWIPP % --BEGIN TEMPLATE--\n
SP06079022ZBWIPPQRDINA4 ZBWIPP % --BEGIN PREAMBLE--\n
SP06080015ZBWIPPQRDINA4 ZBWIPP currentglobal\n
SP06081016ZBWIPPQRDINA4 ZBWIPP true setglobal\n
SP06082033ZBWIPPQRDINA4 ZBWIPP /Generic /Category findresource\n
SP06083028ZBWIPPQRDINA4 ZBWIPP dup length 1 add dict copy\n
SP06084040ZBWIPPQRDINA4 ZBWIPP dup /InstanceType /packedarraytype put\n
SP06085060ZBWIPPQRDINA4 ZBWIPP /uk.co.terryburton.bwipp exch /Category defineresource pop\n
SP06086011ZBWIPPQRDINA4 ZBWIPP setglobal\n
SP06087020ZBWIPPQRDINA4 ZBWIPP % --END PREAMBLE--\n
SP06088000ZBWIPPQRDINA4 ZBWIPP
SP06000017ZBWIPPQRDINA4 ZENC1 BWIPP encode qr 1
SP06001026ZBWIPPQRDINA4 ZENC1 ##usage: BWIPP encode qr 1
SP06002036ZBWIPPQRDINA4 ZENC1 ##DO NOT CHANGE the first two lines!
SP06003059ZBWIPPQRDINA4 ZENC1 /setpacking where {pop currentpacking true setpacking} if\n
SP06004008ZBWIPPQRDINA4 ZENC1 1 dict\n
SP06005062ZBWIPPQRDINA4 ZENC1 dup /renmatrix dup /uk.co.terryburton.bwipp findresource put\n
SP06006007ZBWIPPQRDINA4 ZENC1 begin\n
SP06007011ZBWIPPQRDINA4 ZENC1 /qrcode {\n
SP06008019ZBWIPPQRDINA4 ZENC1 20 dict begin\n
SP06009023ZBWIPPQRDINA4 ZENC1 /options exch def\n
SP06010023ZBWIPPQRDINA4 ZENC1 /barcode exch def\n
SP06011025ZBWIPPQRDINA4 ZENC1 /dontdraw false def\n
SP06012029ZBWIPPQRDINA4 ZENC1 /format (full) def \n
SP06013026ZBWIPPQRDINA4 ZENC1 /version (unset) def\n
SP06014029ZBWIPPQRDINA4 ZENC1 /eclevel (unset) def \n
SP06015020ZBWIPPQRDINA4 ZENC1 /raw false def\n
SP06016022ZBWIPPQRDINA4 ZENC1 /parse false def\n
SP06017006ZBWIPPQRDINA4 ZENC1 \n
SP06018035ZBWIPPQRDINA4 ZENC1 options type /stringtype eq {\n
SP06019022ZBWIPPQRDINA4 ZENC1 1 dict begin\n
SP06020019ZBWIPPQRDINA4 ZENC1 options {\n
SP06021071ZBWIPPQRDINA4 ZENC1 token false eq {exit} if dup length string cvs (=) search\n
SP06022071ZBWIPPQRDINA4 ZENC1 true eq {cvlit exch pop exch def} {cvlit true def} ifelse\n
SP06023016ZBWIPPQRDINA4 ZENC1 } loop\n
SP06024043ZBWIPPQRDINA4 ZENC1 currentdict end /options exch def\n
SP06025010ZBWIPPQRDINA4 ZENC1 } if\n
SP06026026ZBWIPPQRDINA4 ZENC1 options {def} forall\n
SP06027006ZBWIPPQRDINA4 ZENC1 \n
SP06028013ZBWIPPQRDINA4 ZENC1 parse {\n
SP06029040ZBWIPPQRDINA4 ZENC1 /msg barcode length string def\n
SP06030018ZBWIPPQRDINA4 ZENC1 /j 0 def\n
SP06031017ZBWIPPQRDINA4 ZENC1 barcode\n
SP06032012ZBWIPPQRDINA4 ZENC1 { \n
SP06033026ZBWIPPQRDINA4 ZENC1 (^) search {\n
SP06034049ZBWIPPQRDINA4 ZENC1 dup msg exch j exch putinterval\n
SP06035048ZBWIPPQRDINA4 ZENC1 length j add 1 add /j exch def\n
SP06036021ZBWIPPQRDINA4 ZENC1 pop\n
SP06037067ZBWIPPQRDINA4 ZENC1 dup 0 3 getinterval cvi msg exch j 1 sub exch put\n
SP06038053ZBWIPPQRDINA4 ZENC1 dup length 3 sub 3 exch getinterval\n
SP06039017ZBWIPPQRDINA4 ZENC1 } {\n
SP06040049ZBWIPPQRDINA4 ZENC1 dup msg exch j exch putinterval\n
SP06041042ZBWIPPQRDINA4 ZENC1 length j add /j exch def\n
SP06042050ZBWIPPQRDINA4 ZENC1 /barcode msg 0 j getinterval def\n
SP06043022ZBWIPPQRDINA4 ZENC1 exit\n
SP06044023ZBWIPPQRDINA4 ZENC1 } ifelse \n
SP06045016ZBWIPPQRDINA4 ZENC1 } loop\n
SP06046010ZBWIPPQRDINA4 ZENC1 } if\n
SP06047006ZBWIPPQRDINA4 ZENC1 \n
SP06048042ZBWIPPQRDINA4 ZENC1 format (micro) eq {/raw true def} if\n
SP06049006ZBWIPPQRDINA4 ZENC1 \n
SP06050046ZBWIPPQRDINA4 ZENC1 eclevel (unset) eq {/eclevel (M) def} if\n
SP06051006ZBWIPPQRDINA4 ZENC1 \n
SP06052011ZBWIPPQRDINA4 ZENC1 raw {\n
SP06053031ZBWIPPQRDINA4 ZENC1 /msgbits barcode def \n
SP06054011ZBWIPPQRDINA4 ZENC1 } { \n
SP06055036ZBWIPPQRDINA4 ZENC1 /barlen barcode length def\n
SP06056050ZBWIPPQRDINA4 ZENC1 eclevel (unset) eq {/eclevel (M) def} if\n
SP06057010ZBWIPPQRDINA4 ZENC1 \n
SP06058030ZBWIPPQRDINA4 ZENC1 version (unset) eq {\n
SP06059021ZBWIPPQRDINA4 ZENC1 /caps [\n
SP06060019ZBWIPPQRDINA4 ZENC1 [\n
SP06061071ZBWIPPQRDINA4 ZENC1 17 32 53 78 106 134 154 192 23
SP06062012ZBWIPPQRDINA4 ZENC1 0 271 \n
SP06063071ZBWIPPQRDINA4 ZENC1 321 367 425 458 520 586 644 718 79
SP06064012ZBWIPPQRDINA4 ZENC1 2 858 \n
SP06065071ZBWIPPQRDINA4 ZENC1 929 1003 1091 1171 1273 1367 1465 1528 162
SP06066012ZBWIPPQRDINA4 ZENC1 8 1732 \n
SP06067071ZBWIPPQRDINA4 ZENC1 1840 1952 2068 2188 2303 2431 2563 2699 280
SP06068012ZBWIPPQRDINA4 ZENC1 9 2953 \n
SP06069021ZBWIPPQRDINA4 ZENC1 ] [\n
SP06070071ZBWIPPQRDINA4 ZENC1 14 26 42 62 84 106 122 152 18
SP06071012ZBWIPPQRDINA4 ZENC1 0 213 \n
SP06072071ZBWIPPQRDINA4 ZENC1 251 287 331 362 412 450 504 560 62
SP06073012ZBWIPPQRDINA4 ZENC1 4 666 \n
SP06074071ZBWIPPQRDINA4 ZENC1 711 779 857 911 997 1059 1125 1190 126
SP06075012ZBWIPPQRDINA4 ZENC1 4 1370 \n
SP06076071ZBWIPPQRDINA4 ZENC1 1452 1538 1628 1722 1809 1911 1989 2099 221
SP06077012ZBWIPPQRDINA4 ZENC1 3 2331 \n
SP06078021ZBWIPPQRDINA4 ZENC1 ] [\n
SP06079071ZBWIPPQRDINA4 ZENC1 11 20 32 46 60 74 86 108 13
SP06080012ZBWIPPQRDINA4 ZENC1 0 151 \n
SP06081071ZBWIPPQRDINA4 ZENC1 177 203 241 258 292 322 364 394 44
SP06082012ZBWIPPQRDINA4 ZENC1 2 482 \n
SP06083071ZBWIPPQRDINA4 ZENC1 509 565 611 661 715 751 805 868 90
SP06084012ZBWIPPQRDINA4 ZENC1 8 982 \n
SP06085071ZBWIPPQRDINA4 ZENC1 1030 1112 1168 1228 1283 1351 1423 1499 157
SP06086012ZBWIPPQRDINA4 ZENC1 9 1663 \n
SP06087021ZBWIPPQRDINA4 ZENC1 ] [\n
SP06088071ZBWIPPQRDINA4 ZENC1 7 14 24 34 44 58 64 84 9
SP06089012ZBWIPPQRDINA4 ZENC1 8 119 \n
SP06090071ZBWIPPQRDINA4 ZENC1 137 155 177 194 220 250 280 310 33
SP06091012ZBWIPPQRDINA4 ZENC1 8 382 \n
SP06092071ZBWIPPQRDINA4 ZENC1 403 439 461 511 535 593 625 658 69
SP06093012ZBWIPPQRDINA4 ZENC1 8 742 \n
SP06094071ZBWIPPQRDINA4 ZENC1 790 842 898 958 983 1051 1093 1139 121
SP06095012ZBWIPPQRDINA4 ZENC1 9 1273 \n
SP06096019ZBWIPPQRDINA4 ZENC1 ]\n
SP06097019ZBWIPPQRDINA4 ZENC1 ] def\n
SP06098071ZBWIPPQRDINA4 ZENC1 /caps caps (LMQH) eclevel search pop length exch pop exch p
SP06099012ZBWIPPQRDINA4 ZENC1 op get def\n
SP06100022ZBWIPPQRDINA4 ZENC1 /i 1 def\n
SP06101015ZBWIPPQRDINA4 ZENC1 {\n
SP06102055ZBWIPPQRDINA4 ZENC1 barlen caps i 1 sub get le {exit} if \n
SP06103032ZBWIPPQRDINA4 ZENC1 /i i 1 add def\n
SP06104020ZBWIPPQRDINA4 ZENC1 } loop\n
SP06105045ZBWIPPQRDINA4 ZENC1 /version i 10 2 string cvrs def\n
SP06106014ZBWIPPQRDINA4 ZENC1 } if\n
SP06107010ZBWIPPQRDINA4 ZENC1 \n
SP06108055ZBWIPPQRDINA4 ZENC1 /mid (0100) def /term (0000) def /cclen 8 def\n
SP06109044ZBWIPPQRDINA4 ZENC1 version 0 1 getinterval (M) ne { \n
SP06110050ZBWIPPQRDINA4 ZENC1 version cvi 10 ge {/cclen 16 def} if\n
SP06111014ZBWIPPQRDINA4 ZENC1 } if\n
SP06112032ZBWIPPQRDINA4 ZENC1 /midlen mid length def\n
SP06113034ZBWIPPQRDINA4 ZENC1 /termlen term length def\n
SP06114010ZBWIPPQRDINA4 ZENC1 \n
SP06115071ZBWIPPQRDINA4 ZENC1 /msgbits midlen cclen add barlen 8 mul add termlen add string d
SP06116004ZBWIPPQRDINA4 ZENC1 ef\n
SP06117035ZBWIPPQRDINA4 ZENC1 msgbits 0 mid putinterval\n
SP06118067ZBWIPPQRDINA4 ZENC1 (0000000000000000) 0 cclen getinterval cclen string copy \n
SP06119071ZBWIPPQRDINA4 ZENC1 dup barlen cvi 2 cclen string cvrs dup length cclen exch sub ex
SP06120017ZBWIPPQRDINA4 ZENC1 ch putinterval \n
SP06121022ZBWIPPQRDINA4 ZENC1 /cc exch def\n
SP06122039ZBWIPPQRDINA4 ZENC1 msgbits midlen cc putinterval\n
SP06123028ZBWIPPQRDINA4 ZENC1 0 1 barlen 1 sub {\n
SP06124025ZBWIPPQRDINA4 ZENC1 /i exch def\n
SP06125071ZBWIPPQRDINA4 ZENC1 (00000000) 8 string copy dup barcode i get cvi 2 8 string c
SP06126045ZBWIPPQRDINA4 ZENC1 vrs dup length 8 exch sub exch putinterval \n
SP06127071ZBWIPPQRDINA4 ZENC1 msgbits midlen cclen add i 8 mul add 3 -1 roll putinterval\
SP06128001ZBWIPPQRDINA4 ZENC1 n
SP06129015ZBWIPPQRDINA4 ZENC1 } for\n
SP06130068ZBWIPPQRDINA4 ZENC1 msgbits midlen cclen add barlen 8 mul add term putinterval\n
SP06131014ZBWIPPQRDINA4 ZENC1 } ifelse\n
SP06132006ZBWIPPQRDINA4 ZENC1 \n
SP06133016ZBWIPPQRDINA4 ZENC1 /metrics [\n
SP06134010ZBWIPPQRDINA4 ZENC1 \n
SP06135010ZBWIPPQRDINA4 ZENC1 \n
SP06136069ZBWIPPQRDINA4 ZENC1 [ (micro) (M1) 11 98 99 36 [ 2 99 99 99 ] [
SP06137029ZBWIPPQRDINA4 ZENC1 1 0 -1 -1 -1 -1 -1 -1 ] ]\n
SP06138069ZBWIPPQRDINA4 ZENC1 [ (micro) (M2) 13 98 99 80 [ 5 6 99 99 ] [
SP06139029ZBWIPPQRDINA4 ZENC1 1 0 1 0 -1 -1 -1 -1 ] ]\n
SP06140069ZBWIPPQRDINA4 ZENC1 [ (micro) (M3) 15 98 99 132 [ 6 8 99 99 ] [
SP06141029ZBWIPPQRDINA4 ZENC1 1 0 1 0 -1 -1 -1 -1 ] ]\n
SP06142069ZBWIPPQRDINA4 ZENC1 [ (micro) (M4) 17 98 99 192 [ 8 10 14 99 ] [
SP06143029ZBWIPPQRDINA4 ZENC1 1 0 1 0 1 0 -1 -1 ] ]\n
SP06144069ZBWIPPQRDINA4 ZENC1 [ (full) (1) 21 98 99 208 [ 7 10 13 17 ] [
SP06145029ZBWIPPQRDINA4 ZENC1 1 0 1 0 1 0 1 0 ] ]\n
SP06146069ZBWIPPQRDINA4 ZENC1 [ (full) (2) 25 18 99 359 [ 10 16 22 28 ] [
SP06147029ZBWIPPQRDINA4 ZENC1 1 0 1 0 1 0 1 0 ] ]\n
SP06148069ZBWIPPQRDINA4 ZENC1 [ (full) (3) 29 22 99 567 [ 15 26 36 44 ] [
SP06149029ZBWIPPQRDINA4 ZENC1 1 0 1 0 2 0 2 0 ] ]\n
SP06150069ZBWIPPQRDINA4 ZENC1 [ (full) (4) 33 26 99 807 [ 20 36 52 64 ] [
SP06151029ZBWIPPQRDINA4 ZENC1 1 0 2 0 2 0 4 0 ] ]\n
SP06152069ZBWIPPQRDINA4 ZENC1 [ (full) (5) 37 30 99 1079 [ 26 48 72 88 ] [
SP06153029ZBWIPPQRDINA4 ZENC1 1 0 2 0 2 2 2 2 ] ]\n
SP06154069ZBWIPPQRDINA4 ZENC1 [ (full) (6) 41 34 99 1383 [ 36 64 96 112 ] [
SP06155029ZBWIPPQRDINA4 ZENC1 2 0 4 0 4 0 4 0 ] ]\n
SP06156069ZBWIPPQRDINA4 ZENC1 [ (full) (7) 45 22 38 1568 [ 40 72 108 130 ] [
SP06157029ZBWIPPQRDINA4 ZENC1 2 0 4 0 2 4 4 1 ] ]\n
SP06158069ZBWIPPQRDINA4 ZENC1 [ (full) (8) 49 24 42 1936 [ 48 88 132 156 ] [
SP06159029ZBWIPPQRDINA4 ZENC1 2 0 2 2 4 2 4 2 ] ]\n
SP06160069ZBWIPPQRDINA4 ZENC1 [ (full) (9) 53 26 46 2336 [ 60 110 160 192 ] [
SP06161029ZBWIPPQRDINA4 ZENC1 2 0 3 2 4 4 4 4 ] ]\n
SP06162069ZBWIPPQRDINA4 ZENC1 [ (full) (10) 57 28 50 2768 [ 72 130 192 224 ] [
SP06163029ZBWIPPQRDINA4 ZENC1 2 2 4 1 6 2 6 2 ] ]\n
SP06164069ZBWIPPQRDINA4 ZENC1 [ (full) (11) 61 30 54 3232 [ 80 150 224 264 ] [
SP06165029ZBWIPPQRDINA4 ZENC1 4 0 1 4 4 4 3 8 ] ]\n
SP06166069ZBWIPPQRDINA4 ZENC1 [ (full) (12) 65 32 58 3728 [ 96 176 260 308 ] [
SP06167029ZBWIPPQRDINA4 ZENC1 2 2 6 2 4 6 7 4 ] ]\n
SP06168069ZBWIPPQRDINA4 ZENC1 [ (full) (13) 69 34 62 4256 [ 104 198 288 352 ] [
SP06169029ZBWIPPQRDINA4 ZENC1 4 0 8 1 8 4 12 4 ] ]\n
SP06170069ZBWIPPQRDINA4 ZENC1 [ (full) (14) 73 26 46 4651 [ 120 216 320 384 ] [
SP06171029ZBWIPPQRDINA4 ZENC1 3 1 4 5 11 5 11 5 ] ]\n
SP06172069ZBWIPPQRDINA4 ZENC1 [ (full) (15) 77 26 48 5243 [ 132 240 360 432 ] [
SP06173029ZBWIPPQRDINA4 ZENC1 5 1 5 5 5 7 11 7 ] ]\n
SP06174069ZBWIPPQRDINA4 ZENC1 [ (full) (16) 81 26 50 5867 [ 144 280 408 480 ] [
SP06175029ZBWIPPQRDINA4 ZENC1 5 1 7 3 15 2 3 13 ] ]\n
SP06176069ZBWIPPQRDINA4 ZENC1 [ (full) (17) 85 30 54 6523 [ 168 308 448 532 ] [
SP06177029ZBWIPPQRDINA4 ZENC1 1 5 10 1 1 15 2 17 ] ]\n
SP06178069ZBWIPPQRDINA4 ZENC1 [ (full) (18) 89 30 56 7211 [ 180 338 504 588 ] [
SP06179029ZBWIPPQRDINA4 ZENC1 5 1 9 4 17 1 2 19 ] ]\n
SP06180069ZBWIPPQRDINA4 ZENC1 [ (full) (19) 93 30 58 7931 [ 196 364 546 650 ] [
SP06181029ZBWIPPQRDINA4 ZENC1 3 4 3 11 17 4 9 16 ] ]\n
SP06182069ZBWIPPQRDINA4 ZENC1 [ (full) (20) 97 34 62 8683 [ 224 416 600 700 ] [
SP06183029ZBWIPPQRDINA4 ZENC1 3 5 3 13 15 5 15 10 ] ]\n
SP06184069ZBWIPPQRDINA4 ZENC1 [ (full) (21) 101 28 50 9252 [ 224 442 644 750 ] [
SP06185029ZBWIPPQRDINA4 ZENC1 4 4 17 0 17 6 19 6 ] ]\n
SP06186069ZBWIPPQRDINA4 ZENC1 [ (full) (22) 105 26 50 10068 [ 252 476 690 816 ] [
SP06187029ZBWIPPQRDINA4 ZENC1 2 7 17 0 7 16 34 0 ] ]\n
SP06188069ZBWIPPQRDINA4 ZENC1 [ (full) (23) 109 30 54 10916 [ 270 504 750 900 ] [
SP06189029ZBWIPPQRDINA4 ZENC1 4 5 4 14 11 14 16 14 ] ]\n
SP06190069ZBWIPPQRDINA4 ZENC1 [ (full) (24) 113 28 54 11796 [ 300 560 810 960 ] [
SP06191029ZBWIPPQRDINA4 ZENC1 6 4 6 14 11 16 30 2 ] ]\n
SP06192069ZBWIPPQRDINA4 ZENC1 [ (full) (25) 117 32 58 12708 [ 312 588 870 1050 ] [
SP06193029ZBWIPPQRDINA4 ZENC1 8 4 8 13 7 22 22 13 ] ]\n
SP06194071ZBWIPPQRDINA4 ZENC1 [ (full) (26) 121 30 58 13652 [ 336 644 952 1110 ] [ 1
SP06195028ZBWIPPQRDINA4 ZENC1 0 2 19 4 28 6 33 4 ] ]\n
SP06196069ZBWIPPQRDINA4 ZENC1 [ (full) (27) 125 34 62 14628 [ 360 700 1020 1200 ] [
SP06197029ZBWIPPQRDINA4 ZENC1 8 4 22 3 8 26 12 28 ] ]\n
SP06198069ZBWIPPQRDINA4 ZENC1 [ (full) (28) 129 26 50 15371 [ 390 728 1050 1260 ] [
SP06199029ZBWIPPQRDINA4 ZENC1 3 10 3 23 4 31 11 31 ] ]\n
SP06200069ZBWIPPQRDINA4 ZENC1 [ (full) (29) 133 30 54 16411 [ 420 784 1140 1350 ] [
SP06201029ZBWIPPQRDINA4 ZENC1 7 7 21 7 1 37 19 26 ] ]\n
SP06202069ZBWIPPQRDINA4 ZENC1 [ (full) (30) 137 26 52 17483 [ 450 812 1200 1440 ] [
SP06203029ZBWIPPQRDINA4 ZENC1 5 10 19 10 15 25 23 25 ] ]\n
SP06204071ZBWIPPQRDINA4 ZENC1 [ (full) (31) 141 30 56 18587 [ 480 868 1290 1530 ] [ 1
SP06205028ZBWIPPQRDINA4 ZENC1 3 3 2 29 42 1 23 28 ] ]\n
SP06206071ZBWIPPQRDINA4 ZENC1 [ (full) (32) 145 34 60 19723 [ 510 924 1350 1620 ] [ 1
SP06207028ZBWIPPQRDINA4 ZENC1 7 0 10 23 10 35 19 35 ] ]\n
SP06208071ZBWIPPQRDINA4 ZENC1 [ (full) (33) 149 30 58 20891 [ 540 980 1440 1710 ] [ 1
SP06209028ZBWIPPQRDINA4 ZENC1 7 1 14 21 29 19 11 46 ] ]\n
SP06210071ZBWIPPQRDINA4 ZENC1 [ (full) (34) 153 34 62 22091 [ 570 1036 1530 1800 ] [ 1
SP06211028ZBWIPPQRDINA4 ZENC1 3 6 14 23 44 7 59 1 ] ]\n
SP06212071ZBWIPPQRDINA4 ZENC1 [ (full) (35) 157 30 54 23008 [ 570 1064 1590 1890 ] [ 1
SP06213028ZBWIPPQRDINA4 ZENC1 2 7 12 26 39 14 22 41 ] ]\n
SP06214069ZBWIPPQRDINA4 ZENC1 [ (full) (36) 161 24 50 24272 [ 600 1120 1680 1980 ] [
SP06215029ZBWIPPQRDINA4 ZENC1 6 14 6 34 46 10 2 64 ] ]\n
SP06216071ZBWIPPQRDINA4 ZENC1 [ (full) (37) 165 28 54 25568 [ 630 1204 1770 2100 ] [ 1
SP06217028ZBWIPPQRDINA4 ZENC1 7 4 29 14 49 10 24 46 ] ]\n
SP06218069ZBWIPPQRDINA4 ZENC1 [ (full) (38) 169 32 58 26896 [ 660 1260 1860 2220 ] [
SP06219029ZBWIPPQRDINA4 ZENC1 4 18 13 32 48 14 42 32 ] ]\n
SP06220071ZBWIPPQRDINA4 ZENC1 [ (full) (39) 173 26 54 28256 [ 720 1316 1950 2310 ] [ 2
SP06221028ZBWIPPQRDINA4 ZENC1 0 4 40 7 43 22 10 67 ] ]\n
SP06222071ZBWIPPQRDINA4 ZENC1 [ (full) (40) 177 30 58 29648 [ 750 1372 2040 2430 ] [ 1
SP06223028ZBWIPPQRDINA4 ZENC1 9 6 18 31 34 34 20 61 ] ]\n
SP06224011ZBWIPPQRDINA4 ZENC1 ] def\n
SP06225068ZBWIPPQRDINA4 ZENC1 /eclval (LMQH) eclevel search pop length exch pop exch pop def\n
SP06226014ZBWIPPQRDINA4 ZENC1 /i 0 def\n
SP06227008ZBWIPPQRDINA4 ZENC1 { \n
SP06228030ZBWIPPQRDINA4 ZENC1 /m metrics i get def\n
SP06229056ZBWIPPQRDINA4 ZENC1 /frmt m 0 get def \n
SP06230056ZBWIPPQRDINA4 ZENC1 /vers m 1 get def \n
SP06231056ZBWIPPQRDINA4 ZENC1 /size m 2 get def \n
SP06232056ZBWIPPQRDINA4 ZENC1 /asp2 m 3 get def \n
SP06233056ZBWIPPQRDINA4 ZENC1 /asp3 m 4 get def \n
SP06234056ZBWIPPQRDINA4 ZENC1 /nmod m 5 get def \n
SP06235056ZBWIPPQRDINA4 ZENC1 /ncws nmod 8 idiv def \n
SP06236056ZBWIPPQRDINA4 ZENC1 /rbit nmod 8 mod def \n
SP06237056ZBWIPPQRDINA4 ZENC1 /lc4b false def \n
SP06238056ZBWIPPQRDINA4 ZENC1 size 11 eq size 15 eq or { \n
SP06239034ZBWIPPQRDINA4 ZENC1 /ncws ncws 1 add def\n
SP06240025ZBWIPPQRDINA4 ZENC1 /rbit 0 def\n
SP06241028ZBWIPPQRDINA4 ZENC1 /lc4b true def\n
SP06242014ZBWIPPQRDINA4 ZENC1 } if\n
SP06243056ZBWIPPQRDINA4 ZENC1 /ecws m 6 get eclval get def \n
SP06244056ZBWIPPQRDINA4 ZENC1 /dcws ncws ecws sub def \n
SP06245056ZBWIPPQRDINA4 ZENC1 /dmod dcws 8 mul lc4b {4} {0} ifelse sub def \n
SP06246056ZBWIPPQRDINA4 ZENC1 /ecb1 m 7 get eclval 2 mul get def \n
SP06247056ZBWIPPQRDINA4 ZENC1 /ecb2 m 7 get eclval 2 mul 1 add get def \n
SP06248024ZBWIPPQRDINA4 ZENC1 /okay true def\n
SP06249056ZBWIPPQRDINA4 ZENC1 format frmt ne {/okay false def} if \n
SP06250071ZBWIPPQRDINA4 ZENC1 version (unset) ne version vers ne and {/okay false def} if \n
SP06251056ZBWIPPQRDINA4 ZENC1 msgbits length dmod gt {/okay false def} if \n
SP06252056ZBWIPPQRDINA4 ZENC1 ecb1 -1 eq ecb2 -1 eq or {/okay false def} if \n
SP06253000ZBWIPPQRDINA4 ZENC1
SP06000017ZBWIPPQRDINA4 ZENC2 BWIPP encode qr 2
SP06001026ZBWIPPQRDINA4 ZENC2 ##usage: BWIPP encode qr 2
SP06002036ZBWIPPQRDINA4 ZENC2 ##DO NOT CHANGE the first two lines!
SP06003024ZBWIPPQRDINA4 ZENC2 okay {exit} if\n
SP06004024ZBWIPPQRDINA4 ZENC2 /i i 1 add def\n
SP06005012ZBWIPPQRDINA4 ZENC2 } loop\n
SP06006022ZBWIPPQRDINA4 ZENC2 /format frmt def\n
SP06007023ZBWIPPQRDINA4 ZENC2 /version vers def\n
SP06008056ZBWIPPQRDINA4 ZENC2 /dcpb dcws ecb1 ecb2 add idiv def \n
SP06009056ZBWIPPQRDINA4 ZENC2 /ecpb ncws ecb1 ecb2 add idiv dcpb sub def \n
SP06010006ZBWIPPQRDINA4 ZENC2 \n
SP06011026ZBWIPPQRDINA4 ZENC2 /pad dmod string def\n
SP06012054ZBWIPPQRDINA4 ZENC2 0 4 dmod 1 sub {pad exch (0000) putinterval} for\n
SP06013031ZBWIPPQRDINA4 ZENC2 pad 0 msgbits putinterval\n
SP06014044ZBWIPPQRDINA4 ZENC2 /padstrs [ (11101100) (00010001) ] def\n
SP06015019ZBWIPPQRDINA4 ZENC2 /padnum 0 def\n
SP06016071ZBWIPPQRDINA4 ZENC2 msgbits length 8 div ceiling 8 mul cvi 8 dmod lc4b {5} {1} ifelse s
SP06017006ZBWIPPQRDINA4 ZENC2 ub {\n
SP06018050ZBWIPPQRDINA4 ZENC2 pad exch padstrs padnum get putinterval \n
SP06019040ZBWIPPQRDINA4 ZENC2 /padnum padnum 1 add 2 mod def\n
SP06020011ZBWIPPQRDINA4 ZENC2 } for\n
SP06021006ZBWIPPQRDINA4 ZENC2 \n
SP06022026ZBWIPPQRDINA4 ZENC2 /cws dcws array def \n
SP06023028ZBWIPPQRDINA4 ZENC2 0 1 cws length 1 sub {\n
SP06024021ZBWIPPQRDINA4 ZENC2 /c exch def\n
SP06025021ZBWIPPQRDINA4 ZENC2 /bpcw 8 def\n
SP06026057ZBWIPPQRDINA4 ZENC2 lc4b c cws length 1 sub eq and {/bpcw 4 def} if\n
SP06027047ZBWIPPQRDINA4 ZENC2 /cwb pad c 8 mul bpcw getinterval def\n
SP06028019ZBWIPPQRDINA4 ZENC2 /cw 0 def\n
SP06029026ZBWIPPQRDINA4 ZENC2 0 1 bpcw 1 sub {\n
SP06030025ZBWIPPQRDINA4 ZENC2 /i exch def\n
SP06031070ZBWIPPQRDINA4 ZENC2 /cw cw 2 bpcw i sub 1 sub exp cvi cwb i get 48 sub mul add
SP06032006ZBWIPPQRDINA4 ZENC2 def\n
SP06033016ZBWIPPQRDINA4 ZENC2 } for \n
SP06034022ZBWIPPQRDINA4 ZENC2 cws c cw put\n
SP06035012ZBWIPPQRDINA4 ZENC2 } for \n
SP06036006ZBWIPPQRDINA4 ZENC2 \n
SP06037071ZBWIPPQRDINA4 ZENC2 /rsalog [ 1 255 { dup 2 mul dup 256 ge {285 xor} if } repeat ] def\
SP06038001ZBWIPPQRDINA4 ZENC2 n
SP06039026ZBWIPPQRDINA4 ZENC2 /rslog 256 array def\n
SP06040063ZBWIPPQRDINA4 ZENC2 1 1 255 {dup rsalog exch get exch rslog 3 1 roll put} for\n
SP06041006ZBWIPPQRDINA4 ZENC2 \n
SP06042015ZBWIPPQRDINA4 ZENC2 /rsprod {\n
SP06043038ZBWIPPQRDINA4 ZENC2 2 copy 0 ne exch 0 ne and { \n
SP06044070ZBWIPPQRDINA4 ZENC2 rslog exch get exch rslog exch get add 255 mod rsalog exch
SP06045006ZBWIPPQRDINA4 ZENC2 get\n
SP06046013ZBWIPPQRDINA4 ZENC2 } {\n
SP06047023ZBWIPPQRDINA4 ZENC2 pop pop 0\n
SP06048018ZBWIPPQRDINA4 ZENC2 } ifelse\n
SP06049016ZBWIPPQRDINA4 ZENC2 } bind def\n
SP06050006ZBWIPPQRDINA4 ZENC2 \n
SP06051039ZBWIPPQRDINA4 ZENC2 /coeffs [ 1 ecpb {0} repeat ] def\n
SP06052022ZBWIPPQRDINA4 ZENC2 0 1 ecpb 1 sub {\n
SP06053022ZBWIPPQRDINA4 ZENC2 /i exch def \n
SP06054041ZBWIPPQRDINA4 ZENC2 coeffs i 1 add coeffs i get put\n
SP06055018ZBWIPPQRDINA4 ZENC2 i -1 1 {\n
SP06056025ZBWIPPQRDINA4 ZENC2 /j exch def\n
SP06057071ZBWIPPQRDINA4 ZENC2 coeffs j coeffs j 1 sub get coeffs j get rsalog i get rspro
SP06058011ZBWIPPQRDINA4 ZENC2 d xor put\n
SP06059016ZBWIPPQRDINA4 ZENC2 } for \n
SP06060055ZBWIPPQRDINA4 ZENC2 coeffs 0 coeffs 0 get rsalog i get rsprod put\n
SP06061011ZBWIPPQRDINA4 ZENC2 } for\n
SP06062058ZBWIPPQRDINA4 ZENC2 /coeffs coeffs 0 coeffs length 1 sub getinterval def\n
SP06063006ZBWIPPQRDINA4 ZENC2 \n
SP06064016ZBWIPPQRDINA4 ZENC2 /rscodes {\n
SP06065025ZBWIPPQRDINA4 ZENC2 /rscws exch def\n
SP06066032ZBWIPPQRDINA4 ZENC2 /rsnd rscws length def\n
SP06067056ZBWIPPQRDINA4 ZENC2 /rscws [ rscws {} forall ecpb {0} repeat ] def\n
SP06068026ZBWIPPQRDINA4 ZENC2 0 1 rsnd 1 sub {\n
SP06069025ZBWIPPQRDINA4 ZENC2 /m exch def\n
SP06070032ZBWIPPQRDINA4 ZENC2 /k rscws m get def\n
SP06071030ZBWIPPQRDINA4 ZENC2 0 1 ecpb 1 sub {\n
SP06072029ZBWIPPQRDINA4 ZENC2 /j exch def\n
SP06073071ZBWIPPQRDINA4 ZENC2 rscws m j add 1 add coeffs ecpb j sub 1 sub get k rspro
SP06074035ZBWIPPQRDINA4 ZENC2 d rscws m j add 1 add get xor put\n
SP06075019ZBWIPPQRDINA4 ZENC2 } for\n
SP06076015ZBWIPPQRDINA4 ZENC2 } for\n
SP06077037ZBWIPPQRDINA4 ZENC2 rscws rsnd ecpb getinterval\n
SP06078016ZBWIPPQRDINA4 ZENC2 } bind def\n
SP06079006ZBWIPPQRDINA4 ZENC2 \n
SP06080036ZBWIPPQRDINA4 ZENC2 /dcwsb ecb1 ecb2 add array def\n
SP06081036ZBWIPPQRDINA4 ZENC2 /ecwsb ecb1 ecb2 add array def\n
SP06082024ZBWIPPQRDINA4 ZENC2 0 1 ecb1 1 sub { \n
SP06083021ZBWIPPQRDINA4 ZENC2 /i exch def\n
SP06084053ZBWIPPQRDINA4 ZENC2 dcwsb i cws i dcpb mul dcpb getinterval put\n
SP06085041ZBWIPPQRDINA4 ZENC2 ecwsb i dcwsb i get rscodes put\n
SP06086011ZBWIPPQRDINA4 ZENC2 } for\n
SP06087024ZBWIPPQRDINA4 ZENC2 0 1 ecb2 1 sub { \n
SP06088021ZBWIPPQRDINA4 ZENC2 /i exch def\n
SP06089070ZBWIPPQRDINA4 ZENC2 dcwsb ecb1 i add cws ecb1 dcpb mul i dcpb 1 add mul add dcpb 1
SP06090022ZBWIPPQRDINA4 ZENC2 add getinterval put\n
SP06091059ZBWIPPQRDINA4 ZENC2 ecwsb ecb1 i add dcwsb ecb1 i add get rscodes put\n
SP06092011ZBWIPPQRDINA4 ZENC2 } for\n
SP06093006ZBWIPPQRDINA4 ZENC2 \n
SP06094006ZBWIPPQRDINA4 ZENC2 \n
SP06095025ZBWIPPQRDINA4 ZENC2 /cws ncws array def\n
SP06096015ZBWIPPQRDINA4 ZENC2 /cw 0 def\n
SP06097018ZBWIPPQRDINA4 ZENC2 0 1 dcpb { \n
SP06098021ZBWIPPQRDINA4 ZENC2 /i exch def\n
SP06099035ZBWIPPQRDINA4 ZENC2 0 1 ecb1 ecb2 add 1 sub {\n
SP06100025ZBWIPPQRDINA4 ZENC2 /j exch def\n
SP06101041ZBWIPPQRDINA4 ZENC2 i dcwsb j get length lt { \n
SP06102046ZBWIPPQRDINA4 ZENC2 cws cw dcwsb j get i get put\n
SP06103034ZBWIPPQRDINA4 ZENC2 /cw cw 1 add def\n
SP06104018ZBWIPPQRDINA4 ZENC2 } if\n
SP06105015ZBWIPPQRDINA4 ZENC2 } for\n
SP06106011ZBWIPPQRDINA4 ZENC2 } for\n
SP06107024ZBWIPPQRDINA4 ZENC2 0 1 ecpb 1 sub { \n
SP06108021ZBWIPPQRDINA4 ZENC2 /i exch def\n
SP06109035ZBWIPPQRDINA4 ZENC2 0 1 ecb1 ecb2 add 1 sub {\n
SP06110025ZBWIPPQRDINA4 ZENC2 /j exch def\n
SP06111042ZBWIPPQRDINA4 ZENC2 cws cw ecwsb j get i get put\n
SP06112030ZBWIPPQRDINA4 ZENC2 /cw cw 1 add def\n
SP06113015ZBWIPPQRDINA4 ZENC2 } for\n
SP06114011ZBWIPPQRDINA4 ZENC2 } for\n
SP06115006ZBWIPPQRDINA4 ZENC2 \n
SP06116006ZBWIPPQRDINA4 ZENC2 \n
SP06117017ZBWIPPQRDINA4 ZENC2 rbit 0 gt {\n
SP06118041ZBWIPPQRDINA4 ZENC2 /pad cws length 1 add array def\n
SP06119031ZBWIPPQRDINA4 ZENC2 pad 0 cws putinterval\n
SP06120036ZBWIPPQRDINA4 ZENC2 pad pad length 1 sub 0 put\n
SP06121022ZBWIPPQRDINA4 ZENC2 /cws pad def\n
SP06122010ZBWIPPQRDINA4 ZENC2 } if\n
SP06123003ZBWIPPQRDINA4 ZENC2 \n
SP06124006ZBWIPPQRDINA4 ZENC2 \n
SP06125012ZBWIPPQRDINA4 ZENC2 lc4b {\n
SP06126035ZBWIPPQRDINA4 ZENC2 dcws 1 sub 1 ncws 2 sub {\n
SP06127025ZBWIPPQRDINA4 ZENC2 /i exch def\n
SP06128051ZBWIPPQRDINA4 ZENC2 cws i cws i get 15 and 4 bitshift put\n
SP06129071ZBWIPPQRDINA4 ZENC2 cws i cws i 1 add get -4 bitshift 15 and cws i get or put\n
SP06130015ZBWIPPQRDINA4 ZENC2 } for\n
SP06131065ZBWIPPQRDINA4 ZENC2 cws ncws 1 sub cws ncws 1 sub get 15 and 4 bitshift put\n
SP06132010ZBWIPPQRDINA4 ZENC2 } if\n
SP06133006ZBWIPPQRDINA4 ZENC2 \n
SP06134045ZBWIPPQRDINA4 ZENC2 /pixs [ size size mul {-1} repeat ] def\n
SP06135034ZBWIPPQRDINA4 ZENC2 /qmv {size mul add} bind def\n
SP06136006ZBWIPPQRDINA4 ZENC2 \n
SP06137006ZBWIPPQRDINA4 ZENC2 \n
SP06138013ZBWIPPQRDINA4 ZENC2 /fpat [\n
SP06139029ZBWIPPQRDINA4 ZENC2 [ 1 1 1 1 1 1 1 0 ]\n
SP06140029ZBWIPPQRDINA4 ZENC2 [ 1 0 0 0 0 0 1 0 ]\n
SP06141029ZBWIPPQRDINA4 ZENC2 [ 1 0 1 1 1 0 1 0 ]\n
SP06142029ZBWIPPQRDINA4 ZENC2 [ 1 0 1 1 1 0 1 0 ]\n
SP06143029ZBWIPPQRDINA4 ZENC2 [ 1 0 1 1 1 0 1 0 ]\n
SP06144029ZBWIPPQRDINA4 ZENC2 [ 1 0 0 0 0 0 1 0 ]\n
SP06145029ZBWIPPQRDINA4 ZENC2 [ 1 1 1 1 1 1 1 0 ]\n
SP06146029ZBWIPPQRDINA4 ZENC2 [ 0 0 0 0 0 0 0 0 ]\n
SP06147011ZBWIPPQRDINA4 ZENC2 ] def\n
SP06148029ZBWIPPQRDINA4 ZENC2 0 1 fpat length 1 sub {\n
SP06149019ZBWIPPQRDINA4 ZENC2 /y exch def\n
SP06150037ZBWIPPQRDINA4 ZENC2 0 1 fpat 0 get length 1 sub {\n
SP06151021ZBWIPPQRDINA4 ZENC2 /x exch def\n
SP06152035ZBWIPPQRDINA4 ZENC2 /fpb fpat y get x get def\n
SP06153030ZBWIPPQRDINA4 ZENC2 pixs x y qmv fpb put\n
SP06154028ZBWIPPQRDINA4 ZENC2 format (full) eq {\n
SP06155049ZBWIPPQRDINA4 ZENC2 pixs size x sub 1 sub y qmv fpb put\n
SP06156049ZBWIPPQRDINA4 ZENC2 pixs x size y sub 1 sub qmv fpb put\n
SP06157014ZBWIPPQRDINA4 ZENC2 } if\n
SP06158013ZBWIPPQRDINA4 ZENC2 } for\n
SP06159011ZBWIPPQRDINA4 ZENC2 } for\n
SP06160006ZBWIPPQRDINA4 ZENC2 \n
SP06161006ZBWIPPQRDINA4 ZENC2 \n
SP06162016ZBWIPPQRDINA4 ZENC2 /algnpat [\n
SP06163023ZBWIPPQRDINA4 ZENC2 [ 1 1 1 1 1 ]\n
SP06164023ZBWIPPQRDINA4 ZENC2 [ 1 0 0 0 1 ]\n
SP06165023ZBWIPPQRDINA4 ZENC2 [ 1 0 1 0 1 ]\n
SP06166023ZBWIPPQRDINA4 ZENC2 [ 1 0 0 0 1 ]\n
SP06167023ZBWIPPQRDINA4 ZENC2 [ 1 1 1 1 1 ]\n
SP06168011ZBWIPPQRDINA4 ZENC2 ] def\n
SP06169019ZBWIPPQRDINA4 ZENC2 /putalgnpat {\n
SP06170022ZBWIPPQRDINA4 ZENC2 /py exch def\n
SP06171022ZBWIPPQRDINA4 ZENC2 /px exch def\n
SP06172017ZBWIPPQRDINA4 ZENC2 0 1 4 {\n
SP06173026ZBWIPPQRDINA4 ZENC2 /pb exch def\n
SP06174021ZBWIPPQRDINA4 ZENC2 0 1 4 {\n
SP06175030ZBWIPPQRDINA4 ZENC2 /pa exch def\n
SP06176071ZBWIPPQRDINA4 ZENC2 pixs px pa add py pb add qmv algnpat pb get pa get put\
SP06177001ZBWIPPQRDINA4 ZENC2 n
SP06178019ZBWIPPQRDINA4 ZENC2 } for\n
SP06179015ZBWIPPQRDINA4 ZENC2 } for\n
SP06180016ZBWIPPQRDINA4 ZENC2 } bind def\n
SP06181044ZBWIPPQRDINA4 ZENC2 asp2 2 sub asp3 asp2 sub size 13 sub {\n
SP06182021ZBWIPPQRDINA4 ZENC2 /i exch def\n
SP06183024ZBWIPPQRDINA4 ZENC2 i 4 putalgnpat\n
SP06184024ZBWIPPQRDINA4 ZENC2 4 i putalgnpat\n
SP06185011ZBWIPPQRDINA4 ZENC2 } for\n
SP06186044ZBWIPPQRDINA4 ZENC2 asp2 2 sub asp3 asp2 sub size 9 sub { \n
SP06187021ZBWIPPQRDINA4 ZENC2 /x exch def\n
SP06188047ZBWIPPQRDINA4 ZENC2 asp2 2 sub asp3 asp2 sub size 9 sub {\n
SP06189025ZBWIPPQRDINA4 ZENC2 /y exch def\n
SP06190028ZBWIPPQRDINA4 ZENC2 x y putalgnpat\n
SP06191015ZBWIPPQRDINA4 ZENC2 } for\n
SP06192011ZBWIPPQRDINA4 ZENC2 } for\n
SP06193006ZBWIPPQRDINA4 ZENC2 \n
SP06194006ZBWIPPQRDINA4 ZENC2 \n
SP06195024ZBWIPPQRDINA4 ZENC2 format (full) eq {\n
SP06196026ZBWIPPQRDINA4 ZENC2 8 1 size 9 sub {\n
SP06197025ZBWIPPQRDINA4 ZENC2 /i exch def\n
SP06198044ZBWIPPQRDINA4 ZENC2 pixs i 6 qmv i 1 add 2 mod put\n
SP06199044ZBWIPPQRDINA4 ZENC2 pixs 6 i qmv i 1 add 2 mod put\n
SP06200015ZBWIPPQRDINA4 ZENC2 } for\n
SP06201009ZBWIPPQRDINA4 ZENC2 } {\n
SP06202026ZBWIPPQRDINA4 ZENC2 8 1 size 1 sub {\n
SP06203025ZBWIPPQRDINA4 ZENC2 /i exch def\n
SP06204044ZBWIPPQRDINA4 ZENC2 pixs i 0 qmv i 1 add 2 mod put\n
SP06205044ZBWIPPQRDINA4 ZENC2 pixs 0 i qmv i 1 add 2 mod put\n
SP06206015ZBWIPPQRDINA4 ZENC2 } for\n
SP06207014ZBWIPPQRDINA4 ZENC2 } ifelse\n
SP06208006ZBWIPPQRDINA4 ZENC2 \n
SP06209006ZBWIPPQRDINA4 ZENC2 \n
SP06210024ZBWIPPQRDINA4 ZENC2 format (full) eq {\n
SP06211022ZBWIPPQRDINA4 ZENC2 /formatmap [\n
SP06212070ZBWIPPQRDINA4 ZENC2 [ [ 0 8 ] [ 8 size 1 sub ] ] [ [ 1 8 ] [ 8 size 2 sub ] ]
SP06213032ZBWIPPQRDINA4 ZENC2 [ [ 2 8 ] [ 8 size 3 sub ] ]\n
SP06214070ZBWIPPQRDINA4 ZENC2 [ [ 3 8 ] [ 8 size 4 sub ] ] [ [ 4 8 ] [ 8 size 5 sub ] ]
SP06215032ZBWIPPQRDINA4 ZENC2 [ [ 5 8 ] [ 8 size 6 sub ] ]\n
SP06216070ZBWIPPQRDINA4 ZENC2 [ [ 7 8 ] [ 8 size 7 sub ] ] [ [ 8 8 ] [ size 8 sub 8 ] ]
SP06217032ZBWIPPQRDINA4 ZENC2 [ [ 8 7 ] [ size 7 sub 8 ] ]\n
SP06218070ZBWIPPQRDINA4 ZENC2 [ [ 8 5 ] [ size 6 sub 8 ] ] [ [ 8 4 ] [ size 5 sub 8 ] ]
SP06219032ZBWIPPQRDINA4 ZENC2 [ [ 8 3 ] [ size 4 sub 8 ] ]\n
SP06220070ZBWIPPQRDINA4 ZENC2 [ [ 8 2 ] [ size 3 sub 8 ] ] [ [ 8 1 ] [ size 2 sub 8 ] ]
SP06221032ZBWIPPQRDINA4 ZENC2 [ [ 8 0 ] [ size 1 sub 8 ] ]\n
SP06222015ZBWIPPQRDINA4 ZENC2 ] def\n
SP06223009ZBWIPPQRDINA4 ZENC2 } {\n
SP06224022ZBWIPPQRDINA4 ZENC2 /formatmap [\n
SP06225071ZBWIPPQRDINA4 ZENC2 [ [ 1 8 ] ] [ [ 2 8 ] ] [ [ 3 8 ] ] [ [ 4 8 ] ] [ [ 5 8
SP06226006ZBWIPPQRDINA4 ZENC2 ] ]\n
SP06227071ZBWIPPQRDINA4 ZENC2 [ [ 6 8 ] ] [ [ 7 8 ] ] [ [ 8 8 ] ] [ [ 8 7 ] ] [ [ 8 6
SP06228006ZBWIPPQRDINA4 ZENC2 ] ]\n
SP06229071ZBWIPPQRDINA4 ZENC2 [ [ 8 5 ] ] [ [ 8 4 ] ] [ [ 8 3 ] ] [ [ 8 2 ] ] [ [ 8 1
SP06230006ZBWIPPQRDINA4 ZENC2 ] ]\n
SP06231015ZBWIPPQRDINA4 ZENC2 ] def\n
SP06232014ZBWIPPQRDINA4 ZENC2 } ifelse\n
SP06233017ZBWIPPQRDINA4 ZENC2 formatmap {\n
SP06234050ZBWIPPQRDINA4 ZENC2 { {} forall qmv pixs exch 0 put } forall\n
SP06235014ZBWIPPQRDINA4 ZENC2 } forall\n
SP06236006ZBWIPPQRDINA4 ZENC2 \n
SP06237006ZBWIPPQRDINA4 ZENC2 \n
SP06238018ZBWIPPQRDINA4 ZENC2 size 45 ge {\n
SP06239023ZBWIPPQRDINA4 ZENC2 /versionmap [\n
SP06240070ZBWIPPQRDINA4 ZENC2 [ [ size 9 sub 5 ] [ 5 size 9 sub ] ] [ [ size 10 sub 5
SP06241024ZBWIPPQRDINA4 ZENC2 ] [ 5 size 10 sub ] ]\n
SP06242070ZBWIPPQRDINA4 ZENC2 [ [ size 11 sub 5 ] [ 5 size 11 sub ] ] [ [ size 9 sub 4
SP06243024ZBWIPPQRDINA4 ZENC2 ] [ 4 size 9 sub ] ]\n
SP06244070ZBWIPPQRDINA4 ZENC2 [ [ size 10 sub 4 ] [ 4 size 10 sub ] ] [ [ size 11 sub 4
SP06245024ZBWIPPQRDINA4 ZENC2 ] [ 4 size 11 sub ] ]\n
SP06246070ZBWIPPQRDINA4 ZENC2 [ [ size 9 sub 3 ] [ 3 size 9 sub ] ] [ [ size 10 sub 3
SP06247024ZBWIPPQRDINA4 ZENC2 ] [ 3 size 10 sub ] ]\n
SP06248070ZBWIPPQRDINA4 ZENC2 [ [ size 11 sub 3 ] [ 3 size 11 sub ] ] [ [ size 9 sub 2
SP06249024ZBWIPPQRDINA4 ZENC2 ] [ 2 size 9 sub ] ]\n
SP06250070ZBWIPPQRDINA4 ZENC2 [ [ size 10 sub 2 ] [ 2 size 10 sub ] ] [ [ size 11 sub 2
SP06251024ZBWIPPQRDINA4 ZENC2 ] [ 2 size 11 sub ] ]\n
SP06252070ZBWIPPQRDINA4 ZENC2 [ [ size 9 sub 1 ] [ 1 size 9 sub ] ] [ [ size 10 sub 1
SP06253000ZBWIPPQRDINA4 ZENC2
SP06000017ZBWIPPQRDINA4 ZENC3 BWIPP encode qr 3
SP06001026ZBWIPPQRDINA4 ZENC3 ##usage: BWIPP encode qr 3
SP06002036ZBWIPPQRDINA4 ZENC3 ##DO NOT CHANGE the first two lines!
SP06003024ZBWIPPQRDINA4 ZENC3 ] [ 1 size 10 sub ] ]\n
SP06004070ZBWIPPQRDINA4 ZENC3 [ [ size 11 sub 1 ] [ 1 size 11 sub ] ] [ [ size 9 sub 0
SP06005024ZBWIPPQRDINA4 ZENC3 ] [ 0 size 9 sub ] ]\n
SP06006070ZBWIPPQRDINA4 ZENC3 [ [ size 10 sub 0 ] [ 0 size 10 sub ] ] [ [ size 11 sub 0
SP06007024ZBWIPPQRDINA4 ZENC3 ] [ 0 size 11 sub ] ]\n
SP06008015ZBWIPPQRDINA4 ZENC3 ] def\n
SP06009009ZBWIPPQRDINA4 ZENC3 } {\n
SP06010028ZBWIPPQRDINA4 ZENC3 /versionmap [] def\n
SP06011014ZBWIPPQRDINA4 ZENC3 } ifelse\n
SP06012018ZBWIPPQRDINA4 ZENC3 versionmap {\n
SP06013050ZBWIPPQRDINA4 ZENC3 { {} forall qmv pixs exch 0 put } forall\n
SP06014014ZBWIPPQRDINA4 ZENC3 } forall\n
SP06015006ZBWIPPQRDINA4 ZENC3 \n
SP06016006ZBWIPPQRDINA4 ZENC3 \n
SP06017024ZBWIPPQRDINA4 ZENC3 format (full) eq {\n
SP06018037ZBWIPPQRDINA4 ZENC3 pixs 8 size 8 sub qmv 1 put\n
SP06019010ZBWIPPQRDINA4 ZENC3 } if\n
SP06020006ZBWIPPQRDINA4 ZENC3 \n
SP06021006ZBWIPPQRDINA4 ZENC3 \n
SP06022024ZBWIPPQRDINA4 ZENC3 format (full) eq {\n
SP06023023ZBWIPPQRDINA4 ZENC3 /maskfuncs [ \n
SP06024030ZBWIPPQRDINA4 ZENC3 {add 2 mod} bind\n
SP06025035ZBWIPPQRDINA4 ZENC3 {exch pop 2 mod} bind\n
SP06026030ZBWIPPQRDINA4 ZENC3 {pop 3 mod} bind\n
SP06027030ZBWIPPQRDINA4 ZENC3 {add 3 mod} bind\n
SP06028049ZBWIPPQRDINA4 ZENC3 {2 idiv exch 3 idiv add 2 mod} bind\n
SP06029049ZBWIPPQRDINA4 ZENC3 {mul dup 2 mod exch 3 mod add} bind\n
SP06030055ZBWIPPQRDINA4 ZENC3 {mul dup 2 mod exch 3 mod add 2 mod} bind\n
SP06031066ZBWIPPQRDINA4 ZENC3 {2 copy mul 3 mod 3 1 roll add 2 mod add 2 mod} bind\n
SP06032015ZBWIPPQRDINA4 ZENC3 ] def\n
SP06033009ZBWIPPQRDINA4 ZENC3 } {\n
SP06034023ZBWIPPQRDINA4 ZENC3 /maskfuncs [ \n
SP06035035ZBWIPPQRDINA4 ZENC3 {exch pop 2 mod} bind\n
SP06036049ZBWIPPQRDINA4 ZENC3 {2 idiv exch 3 idiv add 2 mod} bind\n
SP06037055ZBWIPPQRDINA4 ZENC3 {mul dup 2 mod exch 3 mod add 2 mod} bind\n
SP06038066ZBWIPPQRDINA4 ZENC3 {2 copy mul 3 mod 3 1 roll add 2 mod add 2 mod} bind\n
SP06039015ZBWIPPQRDINA4 ZENC3 ] def\n
SP06040014ZBWIPPQRDINA4 ZENC3 } ifelse\n
SP06041039ZBWIPPQRDINA4 ZENC3 /masks maskfuncs length array def\n
SP06042030ZBWIPPQRDINA4 ZENC3 0 1 masks length 1 sub {\n
SP06043021ZBWIPPQRDINA4 ZENC3 /m exch def\n
SP06044039ZBWIPPQRDINA4 ZENC3 /mask size size mul array def\n
SP06045026ZBWIPPQRDINA4 ZENC3 0 1 size 1 sub {\n
SP06046025ZBWIPPQRDINA4 ZENC3 /j exch def\n
SP06047030ZBWIPPQRDINA4 ZENC3 0 1 size 1 sub {\n
SP06048029ZBWIPPQRDINA4 ZENC3 /i exch def\n
SP06049048ZBWIPPQRDINA4 ZENC3 i j maskfuncs m get exec 0 eq \n
SP06050059ZBWIPPQRDINA4 ZENC3 pixs i j qmv get -1 eq and {1} {0} ifelse\n
SP06051044ZBWIPPQRDINA4 ZENC3 mask i j qmv 3 -1 roll put\n
SP06052019ZBWIPPQRDINA4 ZENC3 } for\n
SP06053015ZBWIPPQRDINA4 ZENC3 } for\n
SP06054026ZBWIPPQRDINA4 ZENC3 masks m mask put\n
SP06055011ZBWIPPQRDINA4 ZENC3 } for\n
SP06056006ZBWIPPQRDINA4 ZENC3 \n
SP06057006ZBWIPPQRDINA4 ZENC3 \n
SP06058026ZBWIPPQRDINA4 ZENC3 /posx size 1 sub def\n
SP06059026ZBWIPPQRDINA4 ZENC3 /posy size 1 sub def\n
SP06060019ZBWIPPQRDINA4 ZENC3 /dir -1 def \n
SP06061019ZBWIPPQRDINA4 ZENC3 /col 1 def \n
SP06062016ZBWIPPQRDINA4 ZENC3 /num 0 def\n
SP06063008ZBWIPPQRDINA4 ZENC3 { \n
SP06064029ZBWIPPQRDINA4 ZENC3 posx 0 lt {exit} if\n
SP06065040ZBWIPPQRDINA4 ZENC3 pixs posx posy qmv get -1 eq {\n
SP06066067ZBWIPPQRDINA4 ZENC3 cws num 8 idiv get 7 num 8 mod sub neg bitshift 1 and\n
SP06067046ZBWIPPQRDINA4 ZENC3 pixs posx posy qmv 3 -1 roll put\n
SP06068032ZBWIPPQRDINA4 ZENC3 /num num 1 add def\n
SP06069014ZBWIPPQRDINA4 ZENC3 } if\n
SP06070020ZBWIPPQRDINA4 ZENC3 col 1 eq {\n
SP06071024ZBWIPPQRDINA4 ZENC3 /col 0 def\n
SP06072034ZBWIPPQRDINA4 ZENC3 /posx posx 1 sub def\n
SP06073013ZBWIPPQRDINA4 ZENC3 } {\n
SP06074024ZBWIPPQRDINA4 ZENC3 /col 1 def\n
SP06075035ZBWIPPQRDINA4 ZENC3 /posx posx 1 add def \n
SP06076036ZBWIPPQRDINA4 ZENC3 /posy posy dir add def\n
SP06077043ZBWIPPQRDINA4 ZENC3 posy 0 lt posy size ge or { \n
SP06078037ZBWIPPQRDINA4 ZENC3 /dir dir -1 mul def\n
SP06079040ZBWIPPQRDINA4 ZENC3 /posy posy dir add def\n
SP06080038ZBWIPPQRDINA4 ZENC3 /posx posx 2 sub def\n
SP06081018ZBWIPPQRDINA4 ZENC3 \n
SP06082071ZBWIPPQRDINA4 ZENC3 format (full) eq posx 6 eq and {/posx posx 1 sub def} i
SP06083003ZBWIPPQRDINA4 ZENC3 f\n
SP06084018ZBWIPPQRDINA4 ZENC3 } if\n
SP06085018ZBWIPPQRDINA4 ZENC3 } ifelse\n
SP06086012ZBWIPPQRDINA4 ZENC3 } loop\n
SP06087006ZBWIPPQRDINA4 ZENC3 \n
SP06088021ZBWIPPQRDINA4 ZENC3 /evalfulln1n3 {\n
SP06089025ZBWIPPQRDINA4 ZENC3 /scrle exch def\n
SP06090010ZBWIPPQRDINA4 ZENC3 \n
SP06091070ZBWIPPQRDINA4 ZENC3 /scr1 0 scrle { dup 5 ge {add 2 sub dup} if pop } forall def\n
SP06092010ZBWIPPQRDINA4 ZENC3 \n
SP06093021ZBWIPPQRDINA4 ZENC3 /scr3 0 def\n
SP06094036ZBWIPPQRDINA4 ZENC3 3 2 scrle length 3 sub { \n
SP06095025ZBWIPPQRDINA4 ZENC3 /j exch def\n
SP06096040ZBWIPPQRDINA4 ZENC3 scrle j get 3 mod 0 eq { \n
SP06097046ZBWIPPQRDINA4 ZENC3 /fact scrle j get 3 idiv def\n
SP06098071ZBWIPPQRDINA4 ZENC3 scrle j 2 sub 5 getinterval {fact eq} forall and exch p
SP06099014ZBWIPPQRDINA4 ZENC3 op and and {\n
SP06100059ZBWIPPQRDINA4 ZENC3 j 3 eq j 4 add scrle length ge or { \n
SP06101047ZBWIPPQRDINA4 ZENC3 /scr3 scr3 40 add def\n
SP06102027ZBWIPPQRDINA4 ZENC3 } { \n
SP06103071ZBWIPPQRDINA4 ZENC3 scrle j 3 sub get 4 ge scrle j 3 add get 4 ge o
SP06104005ZBWIPPQRDINA4 ZENC3 r {\n
SP06105051ZBWIPPQRDINA4 ZENC3 /scr3 scr3 40 add def\n
SP06106030ZBWIPPQRDINA4 ZENC3 } if\n
SP06107030ZBWIPPQRDINA4 ZENC3 } ifelse\n
SP06108022ZBWIPPQRDINA4 ZENC3 } if\n
SP06109018ZBWIPPQRDINA4 ZENC3 } if\n
SP06110015ZBWIPPQRDINA4 ZENC3 } for\n
SP06111019ZBWIPPQRDINA4 ZENC3 scr1 scr3\n
SP06112016ZBWIPPQRDINA4 ZENC3 } bind def\n
SP06113006ZBWIPPQRDINA4 ZENC3 \n
SP06114006ZBWIPPQRDINA4 ZENC3 \n
SP06115017ZBWIPPQRDINA4 ZENC3 /evalfull {\n
SP06116023ZBWIPPQRDINA4 ZENC3 /sym exch def\n
SP06117039ZBWIPPQRDINA4 ZENC3 /n1 0 def /n2 0 def /n3 0 def\n
SP06118035ZBWIPPQRDINA4 ZENC3 /rle size 1 add array def\n
SP06119035ZBWIPPQRDINA4 ZENC3 /lastpairs size array def\n
SP06120035ZBWIPPQRDINA4 ZENC3 /thispairs size array def\n
SP06121034ZBWIPPQRDINA4 ZENC3 /sizeadd1 size 1 add def\n
SP06122028ZBWIPPQRDINA4 ZENC3 0 1 size 1 sub { \n
SP06123025ZBWIPPQRDINA4 ZENC3 /i exch def\n
SP06124014ZBWIPPQRDINA4 ZENC3 \n
SP06125022ZBWIPPQRDINA4 ZENC3 mark 0 0\n
SP06126040ZBWIPPQRDINA4 ZENC3 i size dup dup mul 1 sub {\n
SP06127071ZBWIPPQRDINA4 ZENC3 sym exch get exch 1 index eq {exch 1 add exch} {1 exch}
SP06128009ZBWIPPQRDINA4 ZENC3 ifelse\n
SP06129019ZBWIPPQRDINA4 ZENC3 } for\n
SP06130017ZBWIPPQRDINA4 ZENC3 pop\n
SP06131056ZBWIPPQRDINA4 ZENC3 rle 0 counttomark 2 sub getinterval astore\n
SP06132066ZBWIPPQRDINA4 ZENC3 evalfulln1n3 n3 add /n3 exch def n1 add /n1 exch def\n
SP06133017ZBWIPPQRDINA4 ZENC3 pop\n
SP06134014ZBWIPPQRDINA4 ZENC3 \n
SP06135057ZBWIPPQRDINA4 ZENC3 /symrow sym i size mul size getinterval def\n
SP06136023ZBWIPPQRDINA4 ZENC3 mark 0 0 \n
SP06137023ZBWIPPQRDINA4 ZENC3 symrow { \n
SP06138067ZBWIPPQRDINA4 ZENC3 exch 1 index eq {exch 1 add exch} {1 exch} ifelse\n
SP06139023ZBWIPPQRDINA4 ZENC3 } forall \n
SP06140017ZBWIPPQRDINA4 ZENC3 pop\n
SP06141056ZBWIPPQRDINA4 ZENC3 rle 0 counttomark 2 sub getinterval astore\n
SP06142066ZBWIPPQRDINA4 ZENC3 evalfulln1n3 n3 add /n3 exch def n1 add /n1 exch def\n
SP06143017ZBWIPPQRDINA4 ZENC3 pop\n
SP06144014ZBWIPPQRDINA4 ZENC3 \n
SP06145063ZBWIPPQRDINA4 ZENC3 /lastpairs thispairs /thispairs lastpairs def def\n
SP06146046ZBWIPPQRDINA4 ZENC3 symrow 0 get 1 eq {0} {1} ifelse\n
SP06147051ZBWIPPQRDINA4 ZENC3 symrow {exch 1 index add exch} forall\n
SP06148017ZBWIPPQRDINA4 ZENC3 pop\n
SP06149034ZBWIPPQRDINA4 ZENC3 thispairs astore pop\n
SP06150022ZBWIPPQRDINA4 ZENC3 i 0 gt {\n
SP06151022ZBWIPPQRDINA4 ZENC3 mark\n
SP06152057ZBWIPPQRDINA4 ZENC3 lastpairs aload pop thispairs aload pop\n
SP06153071ZBWIPPQRDINA4 ZENC3 n2 size { exch sizeadd1 index add 3 and 0 eq {3 add} if
SP06154011ZBWIPPQRDINA4 ZENC3 } repeat\n
SP06155030ZBWIPPQRDINA4 ZENC3 /n2 exch def\n
SP06156029ZBWIPPQRDINA4 ZENC3 cleartomark\n
SP06157018ZBWIPPQRDINA4 ZENC3 } if\n
SP06158015ZBWIPPQRDINA4 ZENC3 } for\n
SP06159003ZBWIPPQRDINA4 ZENC3 \n
SP06160010ZBWIPPQRDINA4 ZENC3 \n
SP06161038ZBWIPPQRDINA4 ZENC3 /dark 0 sym {add} forall def\n
SP06162071ZBWIPPQRDINA4 ZENC3 /n4 dark 100 mul size dup mul div 50 sub abs 5 div cvi 10 mul d
SP06163004ZBWIPPQRDINA4 ZENC3 ef\n
SP06164033ZBWIPPQRDINA4 ZENC3 n1 n2 add n3 add n4 add\n