- Base Architecture:
RV32I
M
ExtensionC
ExtensionZicsr
ExtensionZifencei
Extension- System instructions:
ecall
,ebreak
,mret
.
- Extended Architecture:
XCrypto
- Support the full set of XCrypto instruction extensions.
- Priviledged ISA:
- M mode only.
- Memory mapped
mtime
andmtimecmp
- CSRs:
misa
mvendorid
marchid
mimpid
mhartid
mstatus
mtvec
medeleg
mideleg
mip
mie
instret
cycle
/time
mtime
mtimecmp
mscratch
mepc
mcause
mtval
- Interrupts:
- Timer interrupt
- Software interrupt
- External interrupt
This repository has been archived by the owner on Apr 27, 2023. It is now read-only.