Skip to content

Latest commit

 

History

History
16 lines (9 loc) · 1.71 KB

File metadata and controls

16 lines (9 loc) · 1.71 KB

Bilkent_CS223_Digital_Desing_Computer_Architecture

My solutions to Bilkent University Digital Design Course which focuses on SystemVerilog and computer architecture.

Topics:

Lab1 "Introduction to Digital Logic Circuits": Focuses on understanding and building basic digital circuits using transistors and logic gates, emphasizing schematic drawing and circuit implementation.

Lab2 "FPGA-Based Circuit Design": Advances into implementing digital logic circuits on an FPGA, requiring Xilinx’s design tools and SystemVerilog for circuit modeling and simulation.

Lab3 "Modeling Decoders and MUXs in SystemVerilog": Focuses on developing and simulating decoder and multiplexer circuits using structural and behavioral SystemVerilog, preparing students for FPGA implementation.

Lab4 "Designing and Implementing a Traffic Light System": Focuses on developing a traffic light control system using SystemVerilog, emphasizing state machine design, simulation, and FPGA implementation to manage intersection safety and efficiency.

Lab5 "Designing an 8-Bit Serial Adder": Focuses on constructing an unsigned 8-bit serial adder using shift registers and a full adder in SystemVerilog, culminating in FPGA implementation and control via pushbuttons and switches.

Project: For our CS223 project, we're tasked with creating a simple programmable processor using SystemVerilog. This project is about digital system design, including designing both the datapath and controller of a processor. We need to ensure it supports basic instructions like Load, Store, Add, Subtract, Multiply, Divide, and Display. It's a challenging yet exciting project that requires a solid understanding of processor architecture and SystemVerilog programming.