Skip to content
View mmxsrup's full-sized avatar

Highlights

  • Pro

Block or report mmxsrup

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Pinned Loading

  1. axi4-interface axi4-interface Public

    AXI4 and AXI4-Lite interface definitions

    SystemVerilog 83 27

  2. ahci-baremetal-driver ahci-baremetal-driver Public

    SATA AHCI baremetal driver

    C 19 5

  3. shioya-lab-public/surgefuzz shioya-lab-public/surgefuzz Public

    SurgeFuzz: Surge-Aware Directed Fuzzing for CPU Designs (ICCAD 2023)

    C++ 16 2

  4. CVE-2018-3639 CVE-2018-3639 Public

    Speculative Store Bypass (CVE-2018-3639) proof of concept for Linux

    C 12 3

  5. riscv-processor riscv-processor Public

    RV32I Single Cycle Processor (CPU)

    SystemVerilog 10 2

  6. CVE-2019-5489 CVE-2019-5489 Public

    Page Cache Side Channel Attacks (CVE-2019-5489) proof of concept for Linux

    C 9 3