move rv_add to riscv isolated pacakge

singer/Cargo.toml

@@ -37,11 +37,16 @@ const_env = "0.1.2"
 [features]
 witness-count = []
 test-dbg = []
-dbg-add-opcode = []
+dbg-opcode = []
 
 [[bench]]
 name = "add"
 harness = false
 
+[[bench]]
+name = "rv_add"
+harness = false
+path = "benches/riscv/add.rs"
+
 [profile.bench]
 opt-level = 0

singer/benches/rv_add.rs → singer/benches/riscv/add.rs

@@ -15,28 +15,28 @@ use itertools::Itertools;
 cfg_if::cfg_if! {
   if #[cfg(feature = "flamegraph")] {
     criterion_group! {
-      name = op_rv_add;
+      name = op_add;
       config = Criterion::default().warm_up_time(Duration::from_millis(3000)).with_profiler(pprof::criterion::PProfProfiler::new(100, pprof::criterion::Output::Flamegraph(None)));
-      targets = bench_rv_add
+      targets = bench_add
     }
   } else {
     criterion_group! {
-      name = op_rv_add;
+      name = op_add;
       config = Criterion::default().warm_up_time(Duration::from_millis(3000));
-      targets = bench_rv_add
+      targets = bench_add
     }
   }
 }
 
-criterion_main!(op_rv_add);
+criterion_main!(op_add);
 
 const NUM_SAMPLES: usize = 10;
 #[from_env]
 const RAYON_NUM_THREADS: usize = 8;
 
 use singer::{
     instructions::{
-        riscv_add::RVAddInstruction, Instruction, InstructionGraph, SingerCircuitBuilder,
+        riscv::add::AddInstruction, Instruction, InstructionGraph, SingerCircuitBuilder,
     },
     scheme::GKRGraphProverState,
     CircuitWiresIn, SingerGraphBuilder, SingerParams,
@@ -48,7 +48,7 @@ pub fn is_power_of_2(x: usize) -> bool {
     (x != 0) && ((x & (x - 1)) == 0)
 }
 
-fn bench_rv_add(c: &mut Criterion) {
+fn bench_add(c: &mut Criterion) {
     let max_thread_id = {
         if !is_power_of_2(RAYON_NUM_THREADS) {
             #[cfg(not(feature = "non_pow2_rayon_thread"))]
@@ -73,7 +73,7 @@ fn bench_rv_add(c: &mut Criterion) {
 
     for instance_num_vars in 11..12 {
         // expand more input size once runtime is acceptable
-        let mut group = c.benchmark_group(format!("rv_add_op_{}", instance_num_vars));
+        let mut group = c.benchmark_group(format!("add_op_{}", instance_num_vars));
         group.sample_size(NUM_SAMPLES);
 
         // Benchmark the proving time
@@ -90,7 +90,7 @@ fn bench_rv_add(c: &mut Criterion) {
                     },
             | (mut rng,mut singer_builder, real_challenges)| {
 
-                let size = RVAddInstruction::phase0_size();
+                let size = AddInstruction::phase0_size();
 
                 let phase0: CircuitWiresIn<
                 <GoldilocksExt2 as ff_ext::ExtensionField>::BaseField,
@@ -111,11 +111,11 @@ fn bench_rv_add(c: &mut Criterion) {
 
                     let timer = Instant::now();
 
-                    let _ = RVAddInstruction::construct_graph_and_witness(
+                    let _ = AddInstruction::construct_graph_and_witness(
                         &mut singer_builder.graph_builder,
                         &mut singer_builder.chip_builder,
                         &circuit_builder.insts_circuits
-                            [<RVAddInstruction as Instruction<E>>::OPCODE as usize],
+                            [<AddInstruction as Instruction<E>>::OPCODE as usize],
                         vec![phase0],
                         &real_challenges,
                         1 << instance_num_vars,

singer/src/instructions.rs

@@ -14,7 +14,7 @@ use self::{
     add::AddInstruction, calldataload::CalldataloadInstruction, dup::DupInstruction,
     gt::GtInstruction, jump::JumpInstruction, jumpdest::JumpdestInstruction,
     jumpi::JumpiInstruction, mstore::MstoreInstruction, pop::PopInstruction, push::PushInstruction,
-    ret::ReturnInstruction, riscv_add::RVAddInstruction, swap::SwapInstruction,
+    ret::ReturnInstruction, swap::SwapInstruction,
 };
 
 // arithmetic
@@ -41,8 +41,8 @@ pub mod mstore;
 // system
 pub mod calldataload;
 
-// riscv
-pub mod riscv_add;
+// risc-v
+pub mod riscv;
 
 #[derive(Clone, Debug)]
 pub struct SingerCircuitBuilder<E: ExtensionField> {
@@ -89,7 +89,7 @@ pub(crate) fn construct_instruction_circuits<E: ExtensionField>(
         0xF3 => ReturnInstruction::construct_circuits(challenges),
 
         // RISC-V iSA
-        0x33 => RVAddInstruction::construct_circuits(challenges),
+        0x33 => riscv::add::AddInstruction::construct_circuits(challenges),
         _ => Ok(vec![]), // TODO: Add more instructions.
     }
 }

singer/src/instructions/riscv.rs

@@ -0,0 +1 @@
+pub mod add;

singer/src/instructions/riscv_add.rs → singer/src/instructions/riscv/add.rs

@@ -6,7 +6,7 @@ use simple_frontend::structs::{CircuitBuilder, MixedCell};
 use singer_utils::{
     chip_handler::{
         BytecodeChipOperations, GlobalStateChipOperations, OAMOperations, ROMOperations,
-        RangeChipOperations, RegisterChipOperations, StackChipOperations,
+        RegisterChipOperations,
     },
     constants::OpcodeType,
     register_witness,
@@ -17,16 +17,16 @@ use std::sync::Arc;
 
 use crate::error::ZKVMError;
 
-use super::{ChipChallenges, InstCircuit, InstCircuitLayout, Instruction, InstructionGraph};
+use super::super::{ChipChallenges, InstCircuit, InstCircuitLayout, Instruction, InstructionGraph};
 
-pub struct RVAddInstruction;
+pub struct AddInstruction;
 
-impl<E: ExtensionField> InstructionGraph<E> for RVAddInstruction {
+impl<E: ExtensionField> InstructionGraph<E> for AddInstruction {
     type InstType = Self;
 }
 
 register_witness!(
-    RVAddInstruction,
+    AddInstruction,
     phase0 {
         pc => PCUInt::N_OPRAND_CELLS,
         memory_ts => TSUInt::N_OPRAND_CELLS,
@@ -52,7 +52,7 @@ register_witness!(
     }
 );
 
-impl<E: ExtensionField> Instruction<E> for RVAddInstruction {
+impl<E: ExtensionField> Instruction<E> for AddInstruction {
     const OPCODE: OpcodeType = OpcodeType::RV_ADD;
     const NAME: &'static str = "RV_ADD";
     fn construct_circuit(challenges: ChipChallenges) -> Result<InstCircuit<E>, ZKVMError> {
@@ -190,14 +190,15 @@ mod test {
 
     use crate::{
         instructions::{
-            ChipChallenges, Instruction, InstructionGraph, RVAddInstruction, SingerCircuitBuilder,
+            riscv::add::AddInstruction, ChipChallenges, Instruction, InstructionGraph,
+            SingerCircuitBuilder,
         },
         scheme::GKRGraphProverState,
         test::{get_uint_params, test_opcode_circuit, u2vec},
         CircuitWiresIn, SingerGraphBuilder, SingerParams,
     };
 
-    impl RVAddInstruction {
+    impl AddInstruction {
         #[inline]
         fn phase0_index_map() -> BTreeMap<String, Range<CellId>> {
             let mut map = BTreeMap::new();
@@ -238,16 +239,16 @@ mod test {
     fn test_add_construct_circuit() {
         let challenges = ChipChallenges::default();
 
-        let phase0_idx_map = RVAddInstruction::phase0_index_map();
-        let phase0_witness_size = RVAddInstruction::phase0_size();
+        let phase0_idx_map = AddInstruction::phase0_index_map();
+        let phase0_witness_size = AddInstruction::phase0_size();
 
         if cfg!(feature = "dbg-opcode") {
             println!("ADD: {:?}", &phase0_idx_map);
             println!("ADD witness_size: {:?}", phase0_witness_size);
         }
 
         // initialize general test inputs associated with push1
-        let inst_circuit = RVAddInstruction::construct_circuit(challenges).unwrap();
+        let inst_circuit = AddInstruction::construct_circuit(challenges).unwrap();
 
         if cfg!(feature = "dbg-opcode") {
             println!("{:?}", inst_circuit.circuit.assert_consts);
@@ -343,7 +344,7 @@ mod test {
         let mut singer_builder = SingerGraphBuilder::<E>::new();
 
         let mut rng = test_rng();
-        let size = RVAddInstruction::phase0_size();
+        let size = AddInstruction::phase0_size();
         let phase0: CircuitWiresIn<E::BaseField> = vec![LayerWitness {
             instances: (0..(1 << instance_num_vars))
                 .map(|_| {
@@ -358,10 +359,10 @@ mod test {
 
         let timer = Instant::now();
 
-        let _ = RVAddInstruction::construct_graph_and_witness(
+        let _ = AddInstruction::construct_graph_and_witness(
             &mut singer_builder.graph_builder,
             &mut singer_builder.chip_builder,
-            &circuit_builder.insts_circuits[<RVAddInstruction as Instruction<E>>::OPCODE as usize],
+            &circuit_builder.insts_circuits[<AddInstruction as Instruction<E>>::OPCODE as usize],
             vec![phase0],
             &real_challenges,
             1 << instance_num_vars,
@@ -372,7 +373,7 @@ mod test {
         let (graph, wit) = singer_builder.graph_builder.finalize_graph_and_witness();
 
         println!(
-            "RVAddInstruction::construct_graph_and_witness, instance_num_vars = {}, time = {}",
+            "AddInstruction::construct_graph_and_witness, instance_num_vars = {}, time = {}",
             instance_num_vars,
             timer.elapsed().as_secs_f64()
         );
@@ -386,7 +387,7 @@ mod test {
         let _ = GKRGraphProverState::prove(&graph, &wit, &target_evals, &mut prover_transcript, 1)
             .expect("prove failed");
         println!(
-            "RVAddInstruction::prove, instance_num_vars = {}, time
+            "AddInstruction::prove, instance_num_vars = {}, time
        = {}",
             instance_num_vars,
             timer.elapsed().as_secs_f64()