rate-coding

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diwu1990 / uSystolic-Sim

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A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.

simulation stochastic-computing systolic-arrays unary-computing temporal-computing rate-coding temporal-coding

Updated Nov 7, 2021
C++

diwu1990 / UnarySim

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This is a general-purpose simulator for unary computing based on PyTorch, with the paper accepted to ISCA 2020 and awarded IEEE Micro Top Pick for 2020.

simulation stochastic-computing temporal-computing rate-coding temporal-coding

Updated May 8, 2023
SystemVerilog

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rate-coding

Here are 2 public repositories matching this topic...

diwu1990 / uSystolic-Sim

diwu1990 / UnarySim

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