Introduction

Discipline	Computer Science and Engineering
Lab	VLSI
Experiment	8 - Design Of D-Flip Flop Using Verilog

About the Experiment

This experiment aims to facilitate the understanding of designing positive and negative edge D-Flip Flops using Verilog. It provides the necessary theoretical background, introduces Verilog Hardware coding language, and includes example codes of various circuits. The objective is to enhance the user's knowledge and practical implementation of D Flip Flop circuit design.

To overcome the challenge of testing Verilog skills without a Verilog compiler, a unique approach has been devised. The code required for each design is divided into blocks, with basic syntax provided as a boilerplate. The user is then required to fill in the empty code spaces either by selecting options from drop-down lists or by entering the necessary code in text boxes. This approach helps users understand the fundamental syntax and code structure, which can be utilized with an actual Verilog compiler. This experiment would serve as a background to understand the basic code framing and the checks that the coder has to keep in mind while coding.

To deepen understanding of code flow and systematic execution, the different code blocks are randomly jumbled each time the practice section is loaded. Users must utilize the drag-and-drop feature to reorder the code blocks correctly, ensuring precise code flow. Validation of the code is performed by a JavaScript script, which checks for syntax errors, and compilation errors that would be brought up if a proper compiler would have been used. It tries to mimic the function of a compiler by making a few checks like checking if the variable and node names are valid, if the variables and correctly declared as wire and reg, if the order of module instantiation ports in the testbench is correct, if pre-declared variables are being declared another time etc and then validates the circuit by comparing input and output values with the expected results. It gives a truth table that displays the output and input values as per the code written by the user and also compares it with the expected result and marks the circuit code as success or failure accordingly.

The practice section allows users to experiment with various Verilog code-writing techniques and gain a better understanding of the topic. Additionally, a series of quiz questions with explanations are provided before and after the practice section to evaluate the user's skills and knowledge.

This streamlined and professional version provides a concise overview of the experiment, emphasizing its purpose, methodology, and benefits to the user's learning experience.

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Contributors List

SrNo	Name	Faculty or Student	Department	Institute	Email id
1	Ananya Vaibhavi Pabba	Student	ECE	IIITH	anivaibh24@gmail.com
2	.	.	.	.	.