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Register file cache implementation on the Marssx86 architectural simulator

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RFC - Register File Cache implementation on Marss86

Reference:
1. José-Lorenzo Cruz, Antonio González, Mateo Valero, and Nigel P. Topham. 2000. Multiple-banked register file architectures. SIGARCH Comput. Archit. News 28, 2 (May 2000), 316-325. DOI: https://doi.org/10.1145/342001.339708
2. Avadh Patel, Furat Afram, Shunfei Chen, and Kanad Ghose. 2011. MARSS: a full system simulator for multicore x86 CPUs. In Proceedings of the 48th Design Automation Conference (DAC '11). ACM, New York, NY, USA, 1050-1055. DOI=http://dx.doi.org/10.1145/2024724.2024954

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Register file cache implementation on the Marssx86 architectural simulator

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