Image Processing Toolbox in Verilog using Basys3 FPGA

Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)

The collective code required for completing a 4-year B.Tech Computer Science Engineering Course.

📚Repositório da Disciplina INE5406 - Sistemas Digitais

🔌 Hardware Abstraction Library in Python

SimDSP - DSP Simulator

DSSS Wireless transmit-receive system in VHDL

Academic project for the course of Digital Systems Design. The aim of the project was to design and implement an IIR audio filter on FPGA

CSC302: Digital Logic Design and Analysis [DLDA] & CSL301: Digital System Lab [DS Lab] <Semester III>

Design and implementation of RISC-V processor with a pipelined datapath, controller, and hazard unit.

Materials for the Computer Science course, Digital Design (Logic Circuits)

Low-cost industrial fruit classifier. uses state-of-the-art artificial vision technology to accurately and efficiently sort and grade fruits. The system is capable of identifying and distinguishing between different types and sizes of fruits

A collection of useful material and personal projects from the Computer and Informatics Engineering Bachelor's degree program at the University of Aveiro.

My activity in digital systems

IoT based pigeon detector and repellent build with ESP32 and for Digital Systems' final project, at UNMSM, Lima, Perú.

Neander++ (Neander extended) implementation and testing in VHDL for Digital Systems' 2nd assignment.

SUTD 2020 50.002 Computation Structures Code Dump

Lab dan TM Pengantar Sistem Digital (PSD) 2022/2023 Gasal

digital systems

Digital lab1 using latex