RTL development of Quad Serial Peripheral Interface (Quad-SPI) on QuestaSim using SystemVerilog.
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Oct 19, 2022 - SystemVerilog
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digitalsystemdesign
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Lab solutions of MIT Manipal CSE Dept. for Batch of 2024.
java
distributed-systems
hadoop
algorithms
parallel-computing
embedded-systems
linux-shell
operating-system
data-structures
verilog
mapreduce
cprogramming
object-oriented-programming
embedded-c
parallel-programming
internet-technologies
computernetworks
compilerdesign
digitalsystemdesign
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Apr 11, 2024 - C
DIGITAL CIRCUIT SIMULATOR - an OBJECT ORIENTED PROGRAMMING way of implemeting LOGIC GATES ICs
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Nov 15, 2024 - C++
Projects I made in Digital System Lab. I used Logisim for my projects.
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Jan 25, 2023
Learned as a part of CS210 course
digital
vhdl
ssd
bcd
fulladder
mux
system-programming
xor
dff
halfadder
demux
clockdivider
cs210
xnor
dlatch
adder-subtractor
digitalsystemdesign
digitalsystems
codeconvertor
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Dec 18, 2022 - VHDL
Most of the slides and exercises are my projects and manuscripts (★‿★)
data-mining
sql-server
database
datastructures
risk-analysis
artificial-intelligence
operating-system
software-engineering
datawarehouse
software-testing
proteus
isfahan-university-of-technology
codevision
gametheory
computer-networks
strategic
algorithmdesign
computerengineering
digitalsystemdesign
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Oct 12, 2024 - Jupyter Notebook
Date of Respository Creation: 05/08/2023. This project was undertaken as a part of 4th semester System Verilog Project.
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Nov 13, 2023 - SystemVerilog
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